Accepted intel-microcode 3.20170511.1~bpo8+1 (amd64 i386 source) into jessie-backports->backports-policy, jessie-backports
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Hash: SHA512
Format: 1.8
Date: Mon, 15 May 2017 15:34:34 -0300
Source: intel-microcode
Binary: intel-microcode
Architecture: amd64 i386 source
Version: 3.20170511.1~bpo8+1
Distribution: jessie-backports
Urgency: medium
Maintainer: Henrique de Moraes Holschuh <hmh@debian.org>
Changed-By: Henrique de Moraes Holschuh <hmh@debian.org>
Closes: 862606
Description:
intel-microcode - Processor microcode firmware for Intel CPUs
Changes:
intel-microcode (3.20170511.1~bpo8+1) jessie-backports; urgency=medium
.
* Rebuild for jessie-backports (no changes)
.
intel-microcode (3.20170511.1) unstable; urgency=medium
.
* New upstream microcode datafile 20170511
+ Updated Microcodes:
sig 0x000306c3, pf_mask 0x32, 2017-01-27, rev 0x0022, size 22528
sig 0x000306d4, pf_mask 0xc0, 2017-01-27, rev 0x0025, size 17408
sig 0x000306f2, pf_mask 0x6f, 2017-01-30, rev 0x003a, size 32768
sig 0x000306f4, pf_mask 0x80, 2017-01-30, rev 0x000f, size 16384
sig 0x00040651, pf_mask 0x72, 2017-01-27, rev 0x0020, size 20480
sig 0x00040661, pf_mask 0x32, 2017-01-27, rev 0x0017, size 24576
sig 0x00040671, pf_mask 0x22, 2017-01-27, rev 0x0017, size 11264
sig 0x000406e3, pf_mask 0xc0, 2017-04-09, rev 0x00ba, size 98304
sig 0x000406f1, pf_mask 0xef, 2017-03-01, rev 0xb000021, size 26624
sig 0x000506e3, pf_mask 0x36, 2017-04-09, rev 0x00ba, size 98304
+ This release fixes undisclosed errata on the desktop, mobile and
server processor models from the Haswell, Broadwell, and Skylake
families, including even the high-end multi-socket server Xeons
+ Likely fix the TSC-Deadline LAPIC errata (BDF89, SKL142 and
similar) on several processor families
+ Fix erratum BDF90 on Xeon E7v4, E5v4(?) (closes: #862606)
+ Likely fix serious or critical Skylake errata: SKL138/144,
SKL137/145, SLK149
* Likely fix nightmare-level Skylake erratum SKL150. Fortunately,
either this erratum is very-low-hitting, or gcc/clang/icc/msvc
won't usually issue the affected opcode pattern and it ends up
being rare.
SKL150 - Short loops using both the AH/BH/CH/DH registers and
the corresponding wide register *may* result in unpredictable
system behavior. Requires both logical processors of the same
core (i.e. sibling hyperthreads) to be active to trigger, as
well as a "complex set of micro-architectural conditions"
* source: remove unneeded intel-ucode/ directory
Since release 20170511, upstream ships the microcodes both in .dat
format, and as Linux-style split /lib/firmware/intel-ucode files.
It is simpler to just use the .dat format file for now, so remove
the intel-ucode/ directory. Note: before removal, it was verified
that there were no discrepancies between the two microcode sets
(.dat and intel-ucode/)
* source: remove superseded upstream data file: 20161104
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Files:
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