Bug#990738: ITP: xir -- Xilinx Intermediate Representation (XIR) for deep learning algorithms

[Nobuhiro Iwamatsu <iwamatsu@debian.org>]

Package: wnpp
Severity: wishlist
Owner: Nobuhiro Iwamatsu <iwamatsu@debian.org>
X-Debbugs-Cc: debian-devel@lists.debian.org

* Package name    : xir
  Version         : 1.3.2
  Upstream Author : Jian Weng <jianweng@xilinx.com>
* URL             : https://github.com/Xilinx/Vitis-AI.git
* License         : Apache-2.0
  Programming Lang: C++
  Description     : Xilinx Intermediate Representation (XIR) for deep learning algorithms

 Xilinx Intermediate Representation (XIR) is a graph based
 intermediate representation of the AI algorithms which is well
 designed for compilation and efficient deployment of the
 Domain-specific Processing Unit (DPU) on the FPGA platform.
 Advanced users can apply Whole Application Acceleration to benefit from
 the power of FPGA by extending the XIR to support customized IP in
 Vitis AI flow.