mesa: Changes to 'upstream-experimental'
Makefile | 4
src/gallium/auxiliary/gallivm/lp_bld_debug.cpp | 12 +-
src/gallium/drivers/i915/i915_batch.h | 18 +++-
src/gallium/drivers/i915/i915_clear.c | 5 +
src/gallium/drivers/i915/i915_context.h | 2
src/gallium/drivers/i915/i915_flush.c | 1
src/gallium/drivers/i915/i915_prim_emit.c | 2
src/gallium/drivers/i915/i915_prim_vbuf.c | 3
src/gallium/drivers/i915/i915_state.c | 2
src/gallium/drivers/i915/i915_state_emit.c | 34 ++++---
src/gallium/drivers/i915/i915_winsys.h | 6 +
src/gallium/drivers/r600/r600.h | 3
src/gallium/drivers/r600/r600_blit.c | 2
src/gallium/drivers/r600/r600_query.c | 5 -
src/gallium/drivers/r600/r600_shader.c | 45 ++++++----
src/gallium/winsys/i915/drm/i915_drm_buffer.c | 10 ++
src/gallium/winsys/r600/drm/r600_hw_context.c | 24 +++--
src/glsl/ast_to_hir.cpp | 2
src/glsl/ir_print_visitor.cpp | 10 ++
src/glsl/linker.cpp | 108 ++++++++++++++++--------
src/glsl/lower_if_to_cond_assign.cpp | 4
src/glsl/opt_constant_propagation.cpp | 17 +++
src/mesa/drivers/dri/intel/intel_pixel_bitmap.c | 7 -
src/mesa/main/version.h | 2
src/mesa/program/ir_to_mesa.cpp | 28 ++----
src/mesa/state_tracker/st_format.c | 35 ++++++-
26 files changed, 273 insertions(+), 118 deletions(-)
New commits:
commit b033f050fd5179b051181a0a4b6d94110624d25c
Author: Ian Romanick <ian.d.romanick@intel.com>
Date: Fri Jul 8 18:47:21 2011 -0700
mesa: Fix the parsers build rule so that 'make tarballs' can work
You'd think that with all the commit messages about adding stuff to
tarballs or fixing 'make tarballs' that someone would have noticed
that it was completely broken for 4 months (3158cc7).
diff --git a/Makefile b/Makefile
index 09b1e98..abdeb79 100644
--- a/Makefile
+++ b/Makefile
@@ -463,7 +463,7 @@ parsers: configure
-@touch $(TOP)/configs/current
$(MAKE) -C src/glsl glsl_parser.cpp glsl_parser.h glsl_lexer.cpp
$(MAKE) -C src/glsl/glcpp glcpp-lex.c glcpp-parse.c glcpp-parse.h
- $(MAKE) -C src/mesa/program lex.yy.c program_parse.tab.c program_parse.tab.h
+ $(MAKE) -C src/mesa program/lex.yy.c program/program_parse.tab.c program/program_parse.tab.h
# Everything for new a Mesa release:
ARCHIVES = $(LIB_NAME).tar.gz \
commit c66982f7dcb3670b4bb8f19290dd0d74c84ab600
Author: Ian Romanick <ian.d.romanick@intel.com>
Date: Fri Jul 8 18:26:39 2011 -0700
mesa: Bump version to 7.11-rc1
diff --git a/Makefile b/Makefile
index 131e578..09b1e98 100644
--- a/Makefile
+++ b/Makefile
@@ -183,7 +183,7 @@ ultrix-gcc:
# Rules for making release tarballs
-VERSION=7.11-devel
+VERSION=7.11-rc1
DIRECTORY = Mesa-$(VERSION)
LIB_NAME = MesaLib-$(VERSION)
GLUT_NAME = MesaGLUT-$(VERSION)
diff --git a/src/mesa/main/version.h b/src/mesa/main/version.h
index 2e63358..0ce78aa 100644
--- a/src/mesa/main/version.h
+++ b/src/mesa/main/version.h
@@ -35,7 +35,7 @@ struct gl_context;
#define MESA_MAJOR 7
#define MESA_MINOR 11
#define MESA_PATCH 0
-#define MESA_VERSION_STRING "7.11-devel"
+#define MESA_VERSION_STRING "7.11-rc1"
/* To make version comparison easy */
#define MESA_VERSION(a,b,c) (((a) << 16) + ((b) << 8) + (c))
commit 530c68d616dd2fb9fc5252f41877d5587fbaff17
Author: Ian Romanick <ian.d.romanick@intel.com>
Date: Thu Jun 2 12:42:48 2011 -0700
glsl: Fix depth unbalancing problem in if-statement flattening
Previously, if max_depth were 1, the following code would see the
first if-statement (correctly) not get flattened, but the second
if-statement would (incorrectly) get flattened:
void main()
{
if (a)
gl_Position = vec4(0);
if (b)
gl_Position = vec4(1);
}
This is because the visit_leave(ir_if*) method would not decrement the
depth before returning on the first if-statement.
NOTE: This is a candidate for the 7.10 and 7.11 branches.
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
(cherry picked from commit d2c6cef18aa37d197eb323a0795969d271d02819)
diff --git a/src/glsl/lower_if_to_cond_assign.cpp b/src/glsl/lower_if_to_cond_assign.cpp
index e3a1065..b637eb4 100644
--- a/src/glsl/lower_if_to_cond_assign.cpp
+++ b/src/glsl/lower_if_to_cond_assign.cpp
@@ -149,11 +149,9 @@ ir_visitor_status
ir_if_to_cond_assign_visitor::visit_leave(ir_if *ir)
{
/* Only flatten when beyond the GPU's maximum supported nesting depth. */
- if (this->depth <= this->max_depth)
+ if (this->depth-- <= this->max_depth)
return visit_continue;
- this->depth--;
-
bool found_control_flow = false;
ir_variable *cond_var;
ir_assignment *assign;
commit 576f489dad825424ddee79c2ea6859bdfb03b928
Author: Vadim Girlin <vadimgirlin@gmail.com>
Date: Fri Jul 8 06:19:37 2011 +0400
r600g: introduce r600_bc_src_toggle_neg helper and fix SUB & LRP
SUB & LRP instructions should toggle NEG bit instead of setting it,
otherwise e.g. "SUB a,b,-1" is translated as "ADD a,b,-1"
Signed-off-by: Vadim Girlin <vadimgirlin@gmail.com>
diff --git a/src/gallium/drivers/r600/r600_shader.c b/src/gallium/drivers/r600/r600_shader.c
index 6dae692..6bb5ceb 100644
--- a/src/gallium/drivers/r600/r600_shader.c
+++ b/src/gallium/drivers/r600/r600_shader.c
@@ -945,6 +945,11 @@ static void r600_bc_src_set_abs(struct r600_bc_alu_src *bc_src)
bc_src->neg = 0;
}
+static void r600_bc_src_toggle_neg(struct r600_bc_alu_src *bc_src)
+{
+ bc_src->neg = !bc_src->neg;
+}
+
static void tgsi_dst(struct r600_shader_ctx *ctx,
const struct tgsi_full_dst_register *tgsi_dst,
unsigned swizzle,
@@ -1001,7 +1006,7 @@ static int tgsi_op2_s(struct r600_shader_ctx *ctx, int swap)
/* handle some special cases */
switch (ctx->inst_info->tgsi_opcode) {
case TGSI_OPCODE_SUB:
- alu.src[1].neg = 1;
+ r600_bc_src_toggle_neg(&alu.src[1]);
break;
case TGSI_OPCODE_ABS:
r600_bc_src_set_abs(&alu.src[0]);
@@ -2195,7 +2200,7 @@ static int tgsi_lrp(struct r600_shader_ctx *ctx)
alu.src[0].sel = V_SQ_ALU_SRC_1;
alu.src[0].chan = 0;
r600_bc_src(&alu.src[1], &ctx->src[0], i);
- alu.src[1].neg = 1;
+ r600_bc_src_toggle_neg(&alu.src[1]);
alu.dst.sel = ctx->temp_reg;
alu.dst.chan = i;
if (i == lasti) {
commit 270de51f1df513e0ba79dd1618c5f550640c291f
Author: Vadim Girlin <vadimgirlin@gmail.com>
Date: Fri Jul 8 06:19:36 2011 +0400
r600g: introduce r600_bc_src_set_abs helper and fix LOG
LOG instruction should use absolute values of source operand.
Signed-off-by: Vadim Girlin <vadimgirlin@gmail.com>
diff --git a/src/gallium/drivers/r600/r600_shader.c b/src/gallium/drivers/r600/r600_shader.c
index 5aad3e3..6dae692 100644
--- a/src/gallium/drivers/r600/r600_shader.c
+++ b/src/gallium/drivers/r600/r600_shader.c
@@ -939,6 +939,12 @@ static void r600_bc_src(struct r600_bc_alu_src *bc_src,
bc_src->value = shader_src->value[bc_src->chan];
}
+static void r600_bc_src_set_abs(struct r600_bc_alu_src *bc_src)
+{
+ bc_src->abs = 1;
+ bc_src->neg = 0;
+}
+
static void tgsi_dst(struct r600_shader_ctx *ctx,
const struct tgsi_full_dst_register *tgsi_dst,
unsigned swizzle,
@@ -998,9 +1004,7 @@ static int tgsi_op2_s(struct r600_shader_ctx *ctx, int swap)
alu.src[1].neg = 1;
break;
case TGSI_OPCODE_ABS:
- alu.src[0].abs = 1;
- if (alu.src[0].neg)
- alu.src[0].neg = 0;
+ r600_bc_src_set_abs(&alu.src[0]);
break;
default:
break;
@@ -1505,8 +1509,7 @@ static int tgsi_rsq(struct r600_shader_ctx *ctx)
for (i = 0; i < inst->Instruction.NumSrcRegs; i++) {
r600_bc_src(&alu.src[i], &ctx->src[i], 0);
- alu.src[i].abs = 1;
- alu.src[i].neg = 0;
+ r600_bc_src_set_abs(&alu.src[i]);
}
alu.dst.sel = ctx->temp_reg;
alu.dst.write = 1;
@@ -2489,7 +2492,7 @@ static int tgsi_log(struct r600_shader_ctx *ctx)
int r;
int i;
- /* result.x = floor(log2(src)); */
+ /* result.x = floor(log2(|src|)); */
if (inst->Dst[0].Register.WriteMask & 1) {
if (ctx->bc->chiprev == CHIPREV_CAYMAN) {
for (i = 0; i < 3; i++) {
@@ -2497,6 +2500,7 @@ static int tgsi_log(struct r600_shader_ctx *ctx)
alu.inst = CTX_INST(V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_LOG_IEEE);
r600_bc_src(&alu.src[0], &ctx->src[0], 0);
+ r600_bc_src_set_abs(&alu.src[0]);
alu.dst.sel = ctx->temp_reg;
alu.dst.chan = i;
@@ -2514,6 +2518,7 @@ static int tgsi_log(struct r600_shader_ctx *ctx)
alu.inst = CTX_INST(V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_LOG_IEEE);
r600_bc_src(&alu.src[0], &ctx->src[0], 0);
+ r600_bc_src_set_abs(&alu.src[0]);
alu.dst.sel = ctx->temp_reg;
alu.dst.chan = 0;
@@ -2538,7 +2543,7 @@ static int tgsi_log(struct r600_shader_ctx *ctx)
return r;
}
- /* result.y = src.x / (2 ^ floor(log2(src.x))); */
+ /* result.y = |src.x| / (2 ^ floor(log2(|src.x|))); */
if ((inst->Dst[0].Register.WriteMask >> 1) & 1) {
if (ctx->bc->chiprev == CHIPREV_CAYMAN) {
@@ -2547,6 +2552,7 @@ static int tgsi_log(struct r600_shader_ctx *ctx)
alu.inst = CTX_INST(V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_LOG_IEEE);
r600_bc_src(&alu.src[0], &ctx->src[0], 0);
+ r600_bc_src_set_abs(&alu.src[0]);
alu.dst.sel = ctx->temp_reg;
alu.dst.chan = i;
@@ -2564,6 +2570,7 @@ static int tgsi_log(struct r600_shader_ctx *ctx)
alu.inst = CTX_INST(V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_LOG_IEEE);
r600_bc_src(&alu.src[0], &ctx->src[0], 0);
+ r600_bc_src_set_abs(&alu.src[0]);
alu.dst.sel = ctx->temp_reg;
alu.dst.chan = 1;
@@ -2663,6 +2670,7 @@ static int tgsi_log(struct r600_shader_ctx *ctx)
alu.inst = CTX_INST(V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_MUL);
r600_bc_src(&alu.src[0], &ctx->src[0], 0);
+ r600_bc_src_set_abs(&alu.src[0]);
alu.src[1].sel = ctx->temp_reg;
alu.src[1].chan = 1;
@@ -2677,7 +2685,7 @@ static int tgsi_log(struct r600_shader_ctx *ctx)
return r;
}
- /* result.z = log2(src);*/
+ /* result.z = log2(|src|);*/
if ((inst->Dst[0].Register.WriteMask >> 2) & 1) {
if (ctx->bc->chiprev == CHIPREV_CAYMAN) {
for (i = 0; i < 3; i++) {
@@ -2685,6 +2693,7 @@ static int tgsi_log(struct r600_shader_ctx *ctx)
alu.inst = CTX_INST(V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_LOG_IEEE);
r600_bc_src(&alu.src[0], &ctx->src[0], 0);
+ r600_bc_src_set_abs(&alu.src[0]);
alu.dst.sel = ctx->temp_reg;
if (i == 2)
@@ -2702,6 +2711,7 @@ static int tgsi_log(struct r600_shader_ctx *ctx)
alu.inst = CTX_INST(V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_LOG_IEEE);
r600_bc_src(&alu.src[0], &ctx->src[0], 0);
+ r600_bc_src_set_abs(&alu.src[0]);
alu.dst.sel = ctx->temp_reg;
alu.dst.write = 1;
commit 57fe695a17d649ef09823c2afa224c187eb90faf
Author: Vadim Girlin <vadimgirlin@gmail.com>
Date: Wed Jul 6 05:29:09 2011 +0400
r600g: RSQ: clear NEG for operand
Need to clear NEG bit because it applies after ABS, e.g. "RSQ ..., -1"
uses -|1| as operand.
Signed-off-by: Vadim Girlin <vadimgirlin@gmail.com>
diff --git a/src/gallium/drivers/r600/r600_shader.c b/src/gallium/drivers/r600/r600_shader.c
index f3cbf98..5aad3e3 100644
--- a/src/gallium/drivers/r600/r600_shader.c
+++ b/src/gallium/drivers/r600/r600_shader.c
@@ -1506,6 +1506,7 @@ static int tgsi_rsq(struct r600_shader_ctx *ctx)
for (i = 0; i < inst->Instruction.NumSrcRegs; i++) {
r600_bc_src(&alu.src[i], &ctx->src[i], 0);
alu.src[i].abs = 1;
+ alu.src[i].neg = 0;
}
alu.dst.sel = ctx->temp_reg;
alu.dst.write = 1;
commit 189303fb302b3e2576c5e327fc85a464403a5e0d
Author: Vadim Girlin <vadimgirlin@gmail.com>
Date: Wed Jul 6 05:29:08 2011 +0400
r600g: LIT: swap MUL_LIT operands to fix 0^0
For 0^0 case result of "LOG_CLAMPED ...,0" is -MAX_FLOAT, and then result of
"MUL_LIT ...,0,-MAX_FLOAT,..." is -MAX_FLOAT instead of 0 because of special
src1 checks for -MAX_FLOAT. So swap src0/1:
"MUL_LIT ...,-MAX_FLOAT,0,..." to get expected 0, then result of
"EXP_IEEE ...,0" is 1 as expected for LIT.
Signed-off-by: Vadim Girlin <vadimgirlin@gmail.com>
diff --git a/src/gallium/drivers/r600/r600_shader.c b/src/gallium/drivers/r600/r600_shader.c
index f83d707..f3cbf98 100644
--- a/src/gallium/drivers/r600/r600_shader.c
+++ b/src/gallium/drivers/r600/r600_shader.c
@@ -1388,7 +1388,7 @@ static int tgsi_lit(struct r600_shader_ctx *ctx)
return r;
}
} else {
- /* dst.z = log(src.y) */
+ /* tmp.z = log(src.y) */
memset(&alu, 0, sizeof(struct r600_bc_alu));
alu.inst = CTX_INST(V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_LOG_CLAMPED);
r600_bc_src(&alu.src[0], &ctx->src[0], 1);
@@ -1404,13 +1404,12 @@ static int tgsi_lit(struct r600_shader_ctx *ctx)
chan = alu.dst.chan;
sel = alu.dst.sel;
- /* tmp.x = amd MUL_LIT(src.w, dst.z, src.x ) */
+ /* tmp.x = amd MUL_LIT(tmp.z, src.w, src.x ) */
memset(&alu, 0, sizeof(struct r600_bc_alu));
alu.inst = CTX_INST(V_SQ_ALU_WORD1_OP3_SQ_OP3_INST_MUL_LIT);
- r600_bc_src(&alu.src[0], &ctx->src[0], 3);
- alu.src[1].sel = sel;
- alu.src[1].chan = chan;
-
+ alu.src[0].sel = sel;
+ alu.src[0].chan = chan;
+ r600_bc_src(&alu.src[1], &ctx->src[0], 3);
r600_bc_src(&alu.src[2], &ctx->src[0], 0);
alu.dst.sel = ctx->temp_reg;
alu.dst.chan = 0;
commit c4da12e74fd89c4657931d891c96741647bb45e9
Author: Brian Paul <brianp@vmware.com>
Date: Thu Jul 7 16:47:59 2011 -0600
glsl: use casts to silence warning
(cherry picked from commit 7eb7d67d50fccb64248d1fc6f490895048d7d32e)
diff --git a/src/glsl/linker.cpp b/src/glsl/linker.cpp
index 265da84..34b6483 100644
--- a/src/glsl/linker.cpp
+++ b/src/glsl/linker.cpp
@@ -1248,7 +1248,7 @@ assign_attribute_or_color_locations(gl_shader_program *prog,
*/
const int generic_base = (target_index == MESA_SHADER_VERTEX)
- ? VERT_ATTRIB_GENERIC0 : FRAG_RESULT_DATA0;
+ ? (int) VERT_ATTRIB_GENERIC0 : (int) FRAG_RESULT_DATA0;
const enum ir_variable_mode direction =
(target_index == MESA_SHADER_VERTEX) ? ir_var_in : ir_var_out;
commit 8428b48673a8ab5e7d4e7bfdb1089f28879fbe8b
Author: Brian Paul <brianp@vmware.com>
Date: Fri Jul 8 08:03:40 2011 -0600
gallivm: Fix build with llvm-3.0
LLVM 3.0svn changes pretty rapidly. The change in
Target->createMCInstPrinter() signature which inspired commits
40ae214067673edbda79371969d1730b6194d83e and
92e29dc5b0474c073b0f05d60629fc6c3decfca4 has been reverted.
Signed-off-by: Gustaw Smolarczyk <wielkiegie@gmail.com>
Signed-off-by: Brian Paul <brianp@vmware.com>
(cherry picked from commit fc98444bd58960e6cab28423365923bc7e7af3e1)
Conflicts:
src/gallium/auxiliary/gallivm/lp_bld_debug.cpp
diff --git a/src/gallium/auxiliary/gallivm/lp_bld_debug.cpp b/src/gallium/auxiliary/gallivm/lp_bld_debug.cpp
index 0b724a3..8636cd6 100644
--- a/src/gallium/auxiliary/gallivm/lp_bld_debug.cpp
+++ b/src/gallium/auxiliary/gallivm/lp_bld_debug.cpp
@@ -207,17 +207,13 @@ lp_disassemble(const void* func)
}
raw_debug_ostream Out;
- TargetMachine *TM = T->createTargetMachine(Triple, "");
#if HAVE_LLVM >= 0x0300
unsigned int AsmPrinterVariant = AsmInfo->getAssemblerDialect();
#else
int AsmPrinterVariant = AsmInfo->getAssemblerDialect();
#endif
-#if HAVE_LLVM >= 0x0300
- OwningPtr<MCInstPrinter> Printer(
- T->createMCInstPrinter(*TM, AsmPrinterVariant, *AsmInfo));
-#elif HAVE_LLVM >= 0x0208
+#if HAVE_LLVM >= 0x0208
OwningPtr<MCInstPrinter> Printer(
T->createMCInstPrinter(AsmPrinterVariant, *AsmInfo));
#else
@@ -229,6 +225,12 @@ lp_disassemble(const void* func)
return;
}
+#if HAVE_LLVM >= 0x0300
+ TargetMachine *TM = T->createTargetMachine(Triple, sys::getHostCPUName(), "");
+#else
+ TargetMachine *TM = T->createTargetMachine(Triple, "");
+#endif
+
const TargetInstrInfo *TII = TM->getInstrInfo();
/*
commit b0a4f34ea8f471bbfba133eb2b54996ad28b0244
Author: Marek Olšák <maraeo@gmail.com>
Date: Mon Jun 27 18:57:59 2011 +0200
st/mesa: handle float formats in st_format_datatype
NOTE: This is a candidate for the 7.11 branch.
Reviewed-by: Brian Paul <brianp@vmware.com>
(cherry picked from commit 7de28e80dcd4239a780b0f5fdc6e61e6e56a68aa)
diff --git a/src/mesa/state_tracker/st_format.c b/src/mesa/state_tracker/st_format.c
index 3260297..d1995f1 100644
--- a/src/mesa/state_tracker/st_format.c
+++ b/src/mesa/state_tracker/st_format.c
@@ -85,6 +85,10 @@ st_format_datatype(enum pipe_format format)
format == PIPE_FORMAT_B5G6R5_UNORM) {
return GL_UNSIGNED_SHORT;
}
+ else if (format == PIPE_FORMAT_R11G11B10_FLOAT ||
+ format == PIPE_FORMAT_R9G9B9E5_FLOAT) {
+ return GL_FLOAT;
+ }
else if (format == PIPE_FORMAT_Z24_UNORM_S8_USCALED ||
format == PIPE_FORMAT_S8_USCALED_Z24_UNORM ||
format == PIPE_FORMAT_Z24X8_UNORM ||
@@ -105,18 +109,26 @@ st_format_datatype(enum pipe_format format)
return GL_BYTE;
}
else if (size == 16) {
+ if (desc->channel[i].type == UTIL_FORMAT_TYPE_FLOAT)
+ return GL_HALF_FLOAT;
if (desc->channel[i].type == UTIL_FORMAT_TYPE_UNSIGNED)
return GL_UNSIGNED_SHORT;
else
return GL_SHORT;
}
- else {
- assert( size <= 32 );
+ else if (size <= 32) {
+ if (desc->channel[i].type == UTIL_FORMAT_TYPE_FLOAT)
+ return GL_FLOAT;
if (desc->channel[i].type == UTIL_FORMAT_TYPE_UNSIGNED)
return GL_UNSIGNED_INT;
else
return GL_INT;
}
+ else {
+ assert(size == 64);
+ assert(desc->channel[i].type == UTIL_FORMAT_TYPE_FLOAT);
+ return GL_DOUBLE;
+ }
}
}
else if (format == PIPE_FORMAT_UYVY) {
commit efd0ffd1b0e28d3cb118d501b63b8d92b6e95905
Author: Marek Olšák <maraeo@gmail.com>
Date: Mon Jun 27 19:01:25 2011 +0200
st/mesa: use the first non-VOID channel in st_format_datatype
Otherwise PIPE_FORMAT_X8B8G8R8_UNORM and friends would fail.
NOTE: This is a candidate for the 7.10 and 7.11 branches.
Reviewed-by: Brian Paul <brianp@vmware.com>
(cherry picked from commit 292148dc4b18958d4447df7596311bd2f09fd44f)
diff --git a/src/mesa/state_tracker/st_format.c b/src/mesa/state_tracker/st_format.c
index fa5d8f5..3260297 100644
--- a/src/mesa/state_tracker/st_format.c
+++ b/src/mesa/state_tracker/st_format.c
@@ -68,10 +68,18 @@ GLenum
st_format_datatype(enum pipe_format format)
{
const struct util_format_description *desc;
+ int i;
desc = util_format_description(format);
assert(desc);
+ /* Find the first non-VOID channel. */
+ for (i = 0; i < 4; i++) {
+ if (desc->channel[i].type != UTIL_FORMAT_TYPE_VOID) {
+ break;
+ }
+ }
+
if (desc->layout == UTIL_FORMAT_LAYOUT_PLAIN) {
if (format == PIPE_FORMAT_B5G5R5A1_UNORM ||
format == PIPE_FORMAT_B5G6R5_UNORM) {
@@ -85,21 +93,26 @@ st_format_datatype(enum pipe_format format)
}
else {
const GLuint size = format_max_bits(format);
+
+ assert(i < 4);
+ if (i == 4)
+ return GL_NONE;
+
if (size == 8) {
- if (desc->channel[0].type == UTIL_FORMAT_TYPE_UNSIGNED)
+ if (desc->channel[i].type == UTIL_FORMAT_TYPE_UNSIGNED)
return GL_UNSIGNED_BYTE;
else
return GL_BYTE;
}
else if (size == 16) {
- if (desc->channel[0].type == UTIL_FORMAT_TYPE_UNSIGNED)
+ if (desc->channel[i].type == UTIL_FORMAT_TYPE_UNSIGNED)
return GL_UNSIGNED_SHORT;
else
return GL_SHORT;
}
else {
assert( size <= 32 );
- if (desc->channel[0].type == UTIL_FORMAT_TYPE_UNSIGNED)
+ if (desc->channel[i].type == UTIL_FORMAT_TYPE_UNSIGNED)
return GL_UNSIGNED_INT;
else
return GL_INT;
commit dc062db95d3b82a7bf0b5d7f88c4945fc5c9de2c
Author: Stéphane Marchesin <marcheu@chromium.org>
Date: Wed Jul 6 02:19:48 2011 -0700
i915g: Improve flushing using heuristics.
diff --git a/src/gallium/drivers/i915/i915_batch.h b/src/gallium/drivers/i915/i915_batch.h
index ce2691b..a1f8bca 100644
--- a/src/gallium/drivers/i915/i915_batch.h
+++ b/src/gallium/drivers/i915/i915_batch.h
@@ -29,6 +29,7 @@
#define I915_BATCH_H
#include "i915_batchbuffer.h"
+#include "i915_context.h"
#define BEGIN_BATCH(dwords) \
@@ -49,11 +50,26 @@
#define FLUSH_BATCH(fence) \
i915_flush(i915, fence)
-
/************************************************************************
* i915_flush.c
*/
void i915_flush(struct i915_context *i915, struct pipe_fence_handle **fence);
+/*
+ * Flush if the current color buf is idle and we have more than 256 vertices
+ * queued, or if the current color buf is busy and we have more than 4096
+ * vertices queued.
+ */
+static INLINE void i915_flush_heuristically(struct i915_context* i915,
+ int num_vertex)
+{
+ struct i915_winsys *iws = i915->iws;
+ i915->vertices_since_last_flush += num_vertex;
+ if ( i915->vertices_since_last_flush > 4096
+ || ( i915->vertices_since_last_flush > 256 &&
+ !iws->buffer_is_busy(iws, i915->current.cbuf_bo)) )
+ FLUSH_BATCH(NULL);
+}
+
#endif
diff --git a/src/gallium/drivers/i915/i915_clear.c b/src/gallium/drivers/i915/i915_clear.c
index fcb208d..e1d6a74 100644
--- a/src/gallium/drivers/i915/i915_clear.c
+++ b/src/gallium/drivers/i915/i915_clear.c
@@ -120,6 +120,11 @@ i915_clear_emit(struct pipe_context *pipe, unsigned buffers, const float *rgba,
OUT_BATCH_F(desty + height);
OUT_BATCH_F(destx);
OUT_BATCH_F(desty);
+
+ /* Flush after clear, its expected to be a costly operation.
+ * This is not required, just a heuristic
+ */
+ FLUSH_BATCH(NULL);
}
/**
diff --git a/src/gallium/drivers/i915/i915_context.h b/src/gallium/drivers/i915/i915_context.h
index c964208..8486235 100644
--- a/src/gallium/drivers/i915/i915_context.h
+++ b/src/gallium/drivers/i915/i915_context.h
@@ -264,6 +264,8 @@ struct i915_context {
struct util_slab_mempool transfer_pool;
struct util_slab_mempool texture_transfer_pool;
+ int vertices_since_last_flush;
+
/** blitter/hw-clear */
struct blitter_context* blitter;
diff --git a/src/gallium/drivers/i915/i915_flush.c b/src/gallium/drivers/i915/i915_flush.c
index b4e8114..6d76afa 100644
--- a/src/gallium/drivers/i915/i915_flush.c
+++ b/src/gallium/drivers/i915/i915_flush.c
@@ -77,4 +77,5 @@ void i915_flush(struct i915_context *i915, struct pipe_fence_handle **fence)
i915->static_dirty = ~0;
/* kernel emits flushes in between batchbuffers */
i915->flush_dirty = 0;
+ i915->vertices_since_last_flush = 0;
}
diff --git a/src/gallium/drivers/i915/i915_prim_emit.c b/src/gallium/drivers/i915/i915_prim_emit.c
index 85656cd..1acde97 100644
--- a/src/gallium/drivers/i915/i915_prim_emit.c
+++ b/src/gallium/drivers/i915/i915_prim_emit.c
@@ -166,6 +166,8 @@ emit_prim( struct draw_stage *stage,
for (i = 0; i < nr; i++)
emit_hw_vertex(i915, prim->v[i]);
+
+ i915_flush_heuristically(i915, nr);
}
diff --git a/src/gallium/drivers/i915/i915_prim_vbuf.c b/src/gallium/drivers/i915/i915_prim_vbuf.c
index 79db3b6..d8ae1de 100644
--- a/src/gallium/drivers/i915/i915_prim_vbuf.c
+++ b/src/gallium/drivers/i915/i915_prim_vbuf.c
@@ -487,6 +487,7 @@ draw_arrays_fallback(struct vbuf_render *render,
draw_arrays_generate_indices(render, start, nr, i915_render->fallback);
+ i915_flush_heuristically(i915, nr_indices);
out:
return;
}
@@ -534,6 +535,7 @@ i915_vbuf_render_draw_arrays(struct vbuf_render *render,
nr);
OUT_BATCH(start); /* Beginning vertex index */
+ i915_flush_heuristically(i915, nr);
out:
return;
}
@@ -657,6 +659,7 @@ i915_vbuf_render_draw_elements(struct vbuf_render *render,
save_nr_indices,
i915_render->fallback);
+ i915_flush_heuristically(i915, nr_indices);
out:
return;
}
diff --git a/src/gallium/drivers/i915/i915_winsys.h b/src/gallium/drivers/i915/i915_winsys.h
index 21cfdc9..2043860 100644
--- a/src/gallium/drivers/i915/i915_winsys.h
+++ b/src/gallium/drivers/i915/i915_winsys.h
@@ -207,6 +207,12 @@ struct i915_winsys {
void (*buffer_destroy)(struct i915_winsys *iws,
struct i915_winsys_buffer *buffer);
+
+ /**
+ * Check if a buffer is busy.
+ */
+ boolean (*buffer_is_busy)(struct i915_winsys *iws,
+ struct i915_winsys_buffer *buffer);
/*@}*/
diff --git a/src/gallium/winsys/i915/drm/i915_drm_buffer.c b/src/gallium/winsys/i915/drm/i915_drm_buffer.c
index 01dd4bf..89d8e89 100644
--- a/src/gallium/winsys/i915/drm/i915_drm_buffer.c
+++ b/src/gallium/winsys/i915/drm/i915_drm_buffer.c
@@ -213,6 +213,15 @@ i915_drm_buffer_destroy(struct i915_winsys *iws,
FREE(buffer);
}
+static boolean
+i915_drm_buffer_is_busy(struct i915_winsys *iws,
+ struct i915_winsys_buffer *buffer)
+{
+ struct i915_drm_buffer* i915_buffer = i915_drm_buffer(buffer);
+ return drm_intel_bo_busy(i915_buffer->bo);
+}
+
+
void
i915_drm_winsys_init_buffer_functions(struct i915_drm_winsys *idws)
{
@@ -224,4 +233,5 @@ i915_drm_winsys_init_buffer_functions(struct i915_drm_winsys *idws)
idws->base.buffer_unmap = i915_drm_buffer_unmap;
idws->base.buffer_write = i915_drm_buffer_write;
idws->base.buffer_destroy = i915_drm_buffer_destroy;
+ idws->base.buffer_is_busy = i915_drm_buffer_is_busy;
}
commit b292ef8f88f95087d210d5ac57684dedad5258cd
Author: Stéphane Marchesin <marcheu@chromium.org>
Date: Sun Jul 3 19:43:19 2011 -0700
i915g: Move back to the old method for target format fixup.
Conflicts:
src/gallium/drivers/i915/i915_state_emit.c
diff --git a/src/gallium/drivers/i915/i915_state.c b/src/gallium/drivers/i915/i915_state.c
index 2f1b0f9..76cfd0b 100644
--- a/src/gallium/drivers/i915/i915_state.c
+++ b/src/gallium/drivers/i915/i915_state.c
@@ -243,7 +243,7 @@ i915_create_sampler_state(struct pipe_context *pipe,
/* Shadow:
*/
- if (sampler->compare_mode == PIPE_TEX_COMPARE_R_TO_TEXTURE)
+ if (sampler->compare_mode == PIPE_TEX_COMPARE_R_TO_TEXTURE)
{
cso->state[0] |= (SS2_SHADOW_ENABLE |
i915_translate_compare_func(sampler->compare_func));
diff --git a/src/gallium/drivers/i915/i915_state_emit.c b/src/gallium/drivers/i915/i915_state_emit.c
index 55399a9..cc97dc9 100644
--- a/src/gallium/drivers/i915/i915_state_emit.c
+++ b/src/gallium/drivers/i915/i915_state_emit.c
@@ -349,25 +349,25 @@ static const struct
uint hw_swizzle;
} fixup_formats[] = {
{ PIPE_FORMAT_R8G8B8A8_UNORM, 0x21030000 /* BGRA */},
- { PIPE_FORMAT_L8_UNORM, 0x00000000 /* RRRR */},
- { PIPE_FORMAT_I8_UNORM, 0x00000000 /* RRRR */},
+ { PIPE_FORMAT_L8_UNORM, 0x00030000 /* RRRA */},
+ { PIPE_FORMAT_I8_UNORM, 0x00030000 /* RRRA */},
{ PIPE_FORMAT_A8_UNORM, 0x33330000 /* AAAA */},
{ PIPE_FORMAT_NONE, 0x00000000},
};
-static boolean need_fixup(struct pipe_surface* p)
+static uint need_target_fixup(struct pipe_surface* p)
{
enum pipe_format f;
/* if we don't have a surface bound yet, we don't need to fixup the shader */
if (!p)
- return FALSE;
+ return 0;
f = p->format;
for(int i=0; fixup_formats[i].format != PIPE_FORMAT_NONE; i++)
if (fixup_formats[i].format == f)
- return TRUE;
+ return 1;
- return FALSE;
+ return 0;
}
static uint fixup_swizzle(enum pipe_format f)
@@ -383,29 +383,35 @@ static void
validate_program(struct i915_context *i915, unsigned *batch_space)
{
struct pipe_surface *cbuf_surface = i915->framebuffer.cbufs[0];
+ uint additional_size = need_target_fixup(cbuf_surface);
/* we need more batch space if we want to emulate rgba framebuffers */
- *batch_space = i915->fs->program_len + (need_fixup(cbuf_surface) ? 3 : 0);
+ *batch_space = i915->fs->program_len + 3 * additional_size;
}
static void
emit_program(struct i915_context *i915)
{
struct pipe_surface *cbuf_surface = i915->framebuffer.cbufs[0];
- boolean need_format_fixup = need_fixup(cbuf_surface);
+ uint target_fixup = need_target_fixup(cbuf_surface);
uint i;
/* we should always have, at least, a pass-through program */
assert(i915->fs->program_len > 0);
- for (i = 0; i < i915->fs->program_len; i++) {
- if ((i == 0) && need_format_fixup)
- OUT_BATCH(i915->fs->program[i] + 3);
- else
- OUT_BATCH(i915->fs->program[i]);
+
+ {
+ /* first word has the size, we have to adjust that */
+ uint size = (i915->fs->program[0]);
+ size += target_fixup * 3;
+ OUT_BATCH(size);
}
+ /* output the declarations of the program */
+ for (i=1 ; i < i915->fs->program_len; i++)
+ OUT_BATCH(i915->fs->program[i]);
+
/* we emit an additional mov with swizzle to fake RGBA framebuffers */
- if (need_format_fixup) {
+ if (target_fixup) {
/* mov out_color, out_color.zyxw */
OUT_BATCH(A0_MOV |
(REG_TYPE_OC << A0_DEST_TYPE_SHIFT) |
commit d3bfa9bb4a6be35681e5790ac46bd050803f0161
Author: Eric Anholt <eric@anholt.net>
Date: Wed Jul 6 11:31:00 2011 -0700
intel: Fix use of freed buffer if glBitmap is called after a swap.
Regions looked up from the framebuffer are invalid after
intel_prepare_render().
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=30266
Tested-by: Thomas Jones <thomas.jones@utoronto.ca>
(cherry picked from commit 066bee64e1611093c7e641ba77bbd43f70d08cec)
diff --git a/src/mesa/drivers/dri/intel/intel_pixel_bitmap.c b/src/mesa/drivers/dri/intel/intel_pixel_bitmap.c
index 64c7acc..86d0ef2 100644
--- a/src/mesa/drivers/dri/intel/intel_pixel_bitmap.c
+++ b/src/mesa/drivers/dri/intel/intel_pixel_bitmap.c
@@ -175,7 +175,7 @@ do_blit_bitmap( struct gl_context *ctx,
const GLubyte *bitmap )
{
struct intel_context *intel = intel_context(ctx);
- struct intel_region *dst = intel_drawbuf_region(intel);
+ struct intel_region *dst;
struct gl_framebuffer *fb = ctx->DrawBuffer;
GLfloat tmpColor[4];
GLubyte ubcolor[4];
@@ -198,6 +198,9 @@ do_blit_bitmap( struct gl_context *ctx,
return GL_FALSE;
}
+ intel_prepare_render(intel);
+ dst = intel_drawbuf_region(intel);
+
if (!dst)
return GL_FALSE;
@@ -226,8 +229,6 @@ do_blit_bitmap( struct gl_context *ctx,
if (!intel_check_blit_fragment_ops(ctx, tmpColor[3] == 1.0F))
return GL_FALSE;
- intel_prepare_render(intel);
-
/* Clip to buffer bounds and scissor. */
if (!_mesa_clip_to_region(fb->_Xmin, fb->_Ymin,
fb->_Xmax, fb->_Ymax,
commit 98af04207972e18f1e4e0fa2de0cc1d63ef3e610
Author: Paul Berry <stereotype441@gmail.com>
Date: Tue Jun 28 09:42:24 2011 -0700
glsl: permit explicit locations on fragment shader outputs, not inputs
From the OpenGL docs for GL_ARB_explicit_attrib_location:
This extension provides a method to pre-assign attribute locations to
named vertex shader inputs and color numbers to named fragment shader
outputs.
This was accidentally implemented for fragment shader inputs. This
patch fixes it to apply to fragment shader outputs.
Fixes piglit tests
spec/ARB_explicit_attrib_location/1.{10,20}/compiler/layout-{01,03,06,07,08,09,10}.frag
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
NOTE: This is a candidate for the 7.10 and 7.11 branches.
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=38624
(cherry picked from commit b078aad8ab22d840456688480a8c27d4664297ce)
diff --git a/src/glsl/ast_to_hir.cpp b/src/glsl/ast_to_hir.cpp
index 3b87f0d..35cb206 100644
--- a/src/glsl/ast_to_hir.cpp
+++ b/src/glsl/ast_to_hir.cpp
@@ -1940,7 +1940,7 @@ apply_type_qualifier_to_variable(const struct ast_type_qualifier *qual,
break;
case fragment_shader:
- if (!global_scope || (var->mode != ir_var_in)) {
+ if (!global_scope || (var->mode != ir_var_out)) {
fail = true;
string = "output";
}
commit 127bd9d5b6aaa2664526b927a7e78397a9ef0e40
Author: Ian Romanick <ian.d.romanick@intel.com>
Date: Mon Jun 27 17:59:58 2011 -0700
linker: Assign locations for fragment shader output
Fixes an assertion failure in the piglib out-01.frag
ARB_explicit_attrib_location test. The locations set via the layout
qualifier in fragment shader were not being applied to the shader
outputs. As a result all of these variables still had a location of
-1 set.
This may need some more work for pre-3.0 contexts. The problem is
dealing with generic outputs that lack a layout qualifier. There is
no way for the application to specify a location
(glBindFragDataLocation is not supported) or query the location
assigned by the linker (glGetFragDataLocation is not supported).
NOTE: This is a candidate for the 7.10 and 7.11 branches.
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=38624
Reviewed-by: Eric Anholt <eric@anholt.net>
Cc: Kenneth Graunke <kenneth@whitecape.org>
Cc: Vinson Lee <vlee@vmware.com>
(cherry picked from commit d32d4f780f9dad122adb63086da266aec6e88850)
diff --git a/src/glsl/linker.cpp b/src/glsl/linker.cpp
index b6479e7..265da84 100644
--- a/src/glsl/linker.cpp
+++ b/src/glsl/linker.cpp
@@ -1194,16 +1194,43 @@ find_available_slots(unsigned used_mask, unsigned needed_count)
}
+/**
+ * Assign locations for either VS inputs for FS outputs
+ *
+ * \param prog Shader program whose variables need locations assigned
+ * \param target_index Selector for the program target to receive location
+ * assignmnets. Must be either \c MESA_SHADER_VERTEX or
+ * \c MESA_SHADER_FRAGMENT.
+ * \param max_index Maximum number of generic locations. This corresponds
+ * to either the maximum number of draw buffers or the
+ * maximum number of generic attributes.
+ *
+ * \return
+ * If locations are successfully assigned, true is returned. Otherwise an
+ * error is emitted to the shader link log and false is returned.
+ *
+ * \bug
+ * Locations set via \c glBindFragDataLocation are not currently supported.
+ * Only locations assigned automatically by the linker, explicitly set by a
+ * layout qualifier, or explicitly set by a built-in variable (e.g., \c
+ * gl_FragColor) are supported for fragment shaders.
+ */
bool
-assign_attribute_locations(gl_shader_program *prog, unsigned max_attribute_index)
+assign_attribute_or_color_locations(gl_shader_program *prog,
+ unsigned target_index,
+ unsigned max_index)
{
- /* Mark invalid attribute locations as being used.
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