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[Git][xorg-team/lib/mesa][debian-unstable] 114 commits: docs: Extend calendar entries for 23.2 by 2 releases.



Title: GitLab

Timo Aaltonen pushed to branch debian-unstable at X Strike Force / lib / mesa

Commits:

  • 6fb68b6b
    by Dylan Baker at 2023-09-05T10:10:59-07:00
    docs: Extend calendar entries for 23.2 by 2 releases.
    
  • ad234040
    by Dylan Baker at 2023-09-05T10:11:11-07:00
    docs: update calendar for 23.2.0-rc3
    
  • 7270fe95
    by Dylan Baker at 2023-09-22T08:46:37-07:00
    .pick_status.json: Update to 10e75aae1bddee9795b1ff04ffd656b0da79b5b5
    
  • 69276276
    by Dylan Baker at 2023-09-22T08:46:37-07:00
    .pick_status.json: Updates notes for aebe58458611e0bb585a5bce8e16c1175783f3cc
    
  • 854c11ca
    by Rhys Perry at 2023-09-22T08:46:37-07:00
    radv: disable 64-bit color attachments
    
    These work in some circumstances (dEQP-VK.spirv_assembly.instruction.graphics.16bit_storage.input_output_float_16_to_64.scalar9_tessc),
    but I'm not sure if they work in all, blending certainly doesn't work and
    this probably wasn't intended in the first place.
    
    Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
    Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
    Fixes: 01bd012edd20 ("amd: fix 64-bit integer color image clears")
    Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24400>
    (cherry picked from commit 405f3bf9903f8a8b65da113adc9ef32e02b84fa2)
    
  • 95301ca3
    by Faith Ekstrand at 2023-09-22T08:46:38-07:00
    nir: Handle nir_op_mov properly in opt_shrink_vectors
    
    If the opcode is a mov, it falls into the nir_alu_src_is_trivial_ssa
    case, not the vec case.
    
    Fixes: 94eff7ccd866 ("nir: shrink phi nodes in nir_opt_shrink_vectors")
    Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
    Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24704>
    (cherry picked from commit f9a17c6fef92b1316c9a06465712e094f33add68)
    
  • 3de51743
    by Faith Ekstrand at 2023-09-22T08:46:38-07:00
    nir: Don't handle nir_op_mov in get_undef_mask in opt_undef
    
    It's unnecessary because earlier parts of the pass will ensure that a
    mov of undef is turned into an undef.  It's also wrong because
    nir_op_mov has different semantics from nir_op_vecN when it comes to how
    sources map to destination components.
    
    Fixes: 5f26c21e6246 ("nir: Expand opt_undef to handle undef channels in a store intrinsic")
    Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
    Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24704>
    (cherry picked from commit 408929289aadaf44e57ef60cb7c1ace4958199c7)
    
  • fa023847
    by Mike Blumenkrantz at 2023-09-22T08:46:38-07:00
    vk/graphics: fix CWE handling with DS3
    
    VkPipelineColorBlendStateCreateInfo::attachmentCount cannot be used to
    generate the CWE mask since it cannot be read if enough dynamic state is in use
    
    instead just pass the max mask and let drivers figure it out
    
    cc: mesa-stable
    
    Reviewed-by: Faith Ekstrand <faith.ekstrand@collabora.com>
    Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24673>
    (cherry picked from commit 0fb9064231687ff7af4cb48697ee24b48715b80f)
    
  • 356d59d7
    by Karol Herbst at 2023-09-22T08:46:38-07:00
    nouveau: take glsl_type ref unconditionally
    
    Calling into tgsi_to_nir requires it, which we are running into with vdpau
    and potential other state-trackers still handing us TGSIs over.
    
    Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/9481
    Fixes: 5889c13fcd4 ("nv50,nvc0: Use ttn for tgsi shaders by default")
    Signed-off-by: Karol Herbst <git@karolherbst.de>
    Reviewed-by: M Henning <drawoc@darkrefraction.com>
    Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24740>
    (cherry picked from commit 91029b7e87bba2a28aeb202cdf920d6ec6a70fa7)
    
  • fb774d1d
    by Mike Blumenkrantz at 2023-09-22T08:46:38-07:00
    Revert "vk/wsi/x11: handle geometry updating more asynchronously"
    
    This reverts commit 36d5b58317179e5db32800743ef0faed4655b9fb.
    
    Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24742>
    (cherry picked from commit 8f3499bafcd32171d72bafc7ca8c3381d716aad5)
    
  • a75c0b09
    by Emma Anholt at 2023-09-22T08:46:38-07:00
    disk_cache: Disable the "List" test for RO disk cache.
    
    It uses a poll function that waits for a second hoping for another thread
    to catch up, which is not a reliable way to do synchronization.  The test
    has been spuriously failing merges on a regular basis recently.
    
    This is issue #9222, which I'm leaving open until the author can fix the test.
    
    Fixes: 3b69b67545b6 ("util/fossilize_db: add runtime RO foz db loading via FOZ_DBS_DYNAMIC_LIST")
    Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24755>
    (cherry picked from commit 4dfd306454a4653a8c0b0a37a3e6bb1632abfc9e)
    
  • fbfcab3a
    by Karol Herbst at 2023-09-22T08:46:38-07:00
    nv50: limit max code uploads to 0x8000
    
    I have no idea why a bigger size doesn't work, the hardware doesn't
    complain, but it turns out that uploading big shaders still causes issues
    with the old limit. *shrug*
    
    Fixes: 7f63d2ebdbc ("nv50: fix code uploads bigger than 0x10000 bytes")
    Signed-off-by: Karol Herbst <git@karolherbst.de>
    Reviewed-by: M Henning <drawoc@darkrefraction.com>
    Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24758>
    (cherry picked from commit 3e0cd6dfb9b5c87ad18c3576017c6cc5c7f240a0)
    
  • 6ba01077
    by Sviatoslav Peleshko at 2023-09-22T08:46:38-07:00
    dri: Use RGB internal formats for RGBX formats
    
    These formats do not contain alpha channel, so their internal formats
    should reflect that.
    
    Fixes: bf576772 ("dri_util: add driImageFormatToSizedInternalGLFormat function")
    Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/9429
    Signed-off-by: Sviatoslav Peleshko <sviatoslav.peleshko@globallogic.com>
    Reviewed-by: Daniel Stone <daniels@collabora.com>
    Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24580>
    (cherry picked from commit e62f2c48a0836495381b38b3ab055b0787545de4)
    
  • 8ed55a67
    by Faith Ekstrand at 2023-09-22T08:46:38-07:00
    nir: Fix metadata in nir_lower_is_helper_invocation
    
    It does not preserve everything.  It adds and removes instructions and
    even adds a variable.
    
    Fixes: f17b41ab4f01 ("nir: add lowering pass for helperInvocationEXT()")
    Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
    Acked-by: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
    Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24760>
    (cherry picked from commit 831085afa3f68cef851dca7e50f979a375dab548)
    
  • ea6d27e4
    by Pavel Ondračka at 2023-09-22T08:46:38-07:00
    r300: don't abort on flow control when using draw for vs
    
    It can handle it just fine. Around 250 dEQPs go from Skip to Pass.
    
    Fixes: 1021e2b946b18739b65b575b0770e6158ba05592
    Reviewed-by: Filip Gawin <filip.gawin@collabora.com>
    Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24769>
    (cherry picked from commit 8657a09f9a618102d1eaad503a6c1a63d38dcb02)
    
  • 055cdd28
    by Eric Engestrom at 2023-09-22T08:46:38-07:00
    vc4: drop duplicate .lower_ldexp
    
    It's set 3 lines above already.
    
    Fixes: 2a33ea95d66cd7ba83e2 ("glsl: Retire ldexp lowering in favor of the nir lowering flag.")
    Signed-off-by: Eric Engestrom <eric@igalia.com>
    Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24786>
    (cherry picked from commit af28356de06d7b5adfa3fa87dac157021c3a68a9)
    
  • d28bae9c
    by Eric Engestrom at 2023-09-22T08:46:38-07:00
    zink: fix format in zink_make_{image,texture}_handle_resident()
    
    `ds->db.format` is a `pipe_format`, while `buffer_infos[handle].format` is
    a `VkFormat`; the conversion from one to the other was missing.
    
    Fixes: 99ba529feed6f9917a44 ("zink: implement descriptor buffer handling of bindless texture")
    Signed-off-by: Eric Engestrom <eric@igalia.com>
    Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24790>
    (cherry picked from commit ab0f0d1563365ea29175bd0b07ba34e1f96c9999)
    
  • 65d3635f
    by Alyssa Rosenzweig at 2023-09-22T08:46:38-07:00
    nir/lower_helper_writes: Consider bindless images
    
    These need to be handled like other image ops.
    
    Fixes KHR-GLES31.core.shader_image_load_store.basic-allTargets-atomicFS on Asahi
    with bindless image access forced.
    
    Fixes: 586da7b3290 ("nir: Add nir_lower_helper_writes pass")
    Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
    Reviewed-by: Italo Nicola <italonicola@collabora.com>
    Reviewed-by: Faith Ekstrand <faith.ekstrand@collabora.com>
    Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24778>
    (cherry picked from commit 04ba4059b7243fb9258df12154ce1e7a01e019c8)
    
  • fcbd2579
    by Dylan Baker at 2023-09-22T08:46:38-07:00
    .pick_status.json: Updates notes for f8cb0d8a44afb9c70f38e359ffe0ad57416e66a4
    
  • 4a6ece1a
    by Dylan Baker at 2023-09-22T08:46:38-07:00
    Revert "Revert "intel/ci: disable iris-jsl-deqp because it always fails for an AMD MR""
    
    This reverts commit dd98f9876498f80a34dc9dbd954385cc1a8bf267.
    
  • 6de9ef12
    by Alyssa Rosenzweig at 2023-09-22T08:46:38-07:00
    nir/passthrough_gs: Fix array size
    
    Triangle strips with adjacency have 6 vertices input, so we need an array big
    enough for all 6 vertices to avoid overflow. Fixes passthrough GS generated for
    KHR-GLES31.core.draw_indirect.basic-mode-*-triangle*adj*.
    
    Fixes: ea14579f3dc ("nir: handle primitives with adjacency")
    Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
    Reviewed-by: Antonino Maniscalco <antonino.maniscalco@collabora.com>
    Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24780>
    (cherry picked from commit 558e36f64196ec734e4c7502db491f56f76118cd)
    
  • 4b3549b1
    by Eric Engestrom at 2023-09-22T08:46:38-07:00
    v3dv: fix VK_PIPELINE_ROBUSTNESS_{BUFFER,IMAGE}_BEHAVIOR_DEVICE_DEFAULT_EXT copy/paste typo
    
    Fixes: 24d9a80247605ac2c237 ("v3dv: implement VK_EXT_pipeline_robustness")
    Signed-off-by: Eric Engestrom <eric@igalia.com>
    Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
    Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24787>
    (cherry picked from commit 4dc0cb1ebea1cc8f9e1b46bb38dd21cdf2643437)
    
  • c68687e3
    by Eric Engestrom at 2023-09-22T08:46:38-07:00
    v3dv: fix copy/pasted type of `sample`
    
    And use the type in functions instead of a generic `uint32_t` to make it
    easier to notice the wrong type.
    
    Fixes: 47e02a2ef11237cf4c2c ("v3dv: add a fast path for vkCmdClearAttachments")
    Signed-off-by: Eric Engestrom <eric@igalia.com>
    Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
    Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24787>
    (cherry picked from commit ae0cb0b998fb772fc76226d9b85b21c1fadea448)
    
  • c8a08be8
    by Eric Engestrom at 2023-09-22T08:46:38-07:00
    v3dv: fix shader stage name in error message
    
    Fixes: 60145629a2bdcd4e7835 ("v3dv: initial CreateGraphicsPipeline/DestroyPipeline implementation")
    Signed-off-by: Eric Engestrom <eric@igalia.com>
    Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
    Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24787>
    (cherry picked from commit 8a1f3d0d73f0908d679bf8a97bafcb2dbc4661fd)
    
  • cb95664d
    by Eric Engestrom at 2023-09-22T08:46:38-07:00
    v3d/qpu: fix type of function argument
    
    Fixes: 05c7d9715b8a419fd6fb ("broadcom: Add V3D 3.3 QPU instruction pack, unpack, and disasm.")
    Signed-off-by: Eric Engestrom <eric@igalia.com>
    Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
    Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24787>
    (cherry picked from commit 953ac9da7949a7d2333680aa77ff20288a247f19)
    
  • 8084345d
    by Marek Olšák at 2023-09-22T08:46:38-07:00
    Revert "ac: don't call ac_query_pci_bus_info from ac_query_gpu_info"
    
    This reverts commit a48642400be86a17d460ce2786988ec67f423f01.
    
    Instead, add a new parameter require_pci_bus_info to control the behavior.
    
    Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
    Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24759>
    (cherry picked from commit 5d19a0a19ba2ffe50a7d05fcf0ff17e0078c2d8e)
    
  • 657c8abc
    by Samuel Pitoiset at 2023-09-22T08:46:38-07:00
    Revert "radv/amdgpu: workaround a kernel bug when replacing sparse mappings"
    
    This workaround was added temporarily but it can actually cause
    stuttering in some games like Forza Horizon 5.
    
    The kernel fix
    (https://lists.freedesktop.org/archives/amd-gfx/2023-June/094648.html)
    landed in some stable kernels (5.15.121+, 6.1.40+ and 6.4.5+). Sadly,
    older stable kernels don't have it, so you might experiment random GPU
    hangs in games that use sparse mapping. Please ensure your kernel is
    up-to-date for the best experience.
    
    This reverts commit 9b00867327c2b266fcdebcef8bc7e7497eaab06b.
    
    Cc: mesa-stable
    Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/9443
    Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
    Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24774>
    (cherry picked from commit f67eb9ce07e6b19fa5cae6f14551094bf236765b)
    
  • 00415298
    by Samuel Pitoiset at 2023-09-22T08:46:38-07:00
    Revert "radv/amdgpu: skip adding per VM BOs for sparse during CS BO list build"
    
    This reverts commit 51caece74cd54e99a5f89521e8feacd894781ca2.
    
    Cc: mesa-stable
    Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
    Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24774>
    (cherry picked from commit e3fae0173005801ba39d50de3944bc6113e2a624)
    
  • c71b07bc
    by Tatsuyuki Ishi at 2023-09-22T08:46:38-07:00
    radv/amdgpu: Do not pass in a BO handle when clearing PRT VA region.
    
    This field is invalid to access for virtual BOs.
    
    Fixes: a931d5a4a4d ("radv/winsys: clear the PRT VA range when destroying a virtual BO")
    Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24805>
    (cherry picked from commit 6c5512568b18e5c16f695c9d4d2dd862dc3c54f8)
    
  • f36e5c85
    by Mike Blumenkrantz at 2023-09-22T08:46:38-07:00
    zink: wait on async fence during ctx program removal
    
    removed=true implies that no async jobs are outstanding
    
    fixes #9580
    
    cc: mesa-stable
    
    Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24811>
    (cherry picked from commit ca987c0dfb97d22d3cf2632f38d9d749162767b0)
    
  • 9ddd8fff
    by Chia-I Wu at 2023-09-22T08:46:38-07:00
    ac/surface: limit RADEON_SURF_NO_TEXTURE to color surfaces
    
    For z surfaces, flags.texture should be based on
    RADEON_SURF_TC_COMPATIBLE_HTILE alone.  Otherwise, addrlib could pick a
    _X/_T swizzle mode for a MSAA depth texture, which is said to be broken:
    
      When _X/_T swizzle mode was used for MSAA depth texture, TC will get zplane
      equation from wrong address within memory range a tile covered and use the
      garbage data for compressed Z reading which finally leads to corruption.
    
    Fixes: de0885cdb89 ("amd/surface: add RADEON_SURF_NO_TEXTURE flag")
    Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24767>
    (cherry picked from commit e74c3dbb70706f1a2bcf863b5058295fcd456ae4)
    
  • ab351825
    by Friedrich Vock at 2023-09-22T08:46:38-07:00
    nir/load_store_vectorize: Handle intrinsics with constant base
    
    This includes nir_load_stack and nir_store_stack, which are vectorized
    in nir_lower_shader_calls. If not adjusted, we end up loading from
    the wrong base.
    
    Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/9596
    Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/9587
    Cc: mesa-stable
    Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24789>
    (cherry picked from commit a28ff7f2405a4ddd0bcc309af252520e342b7ffe)
    
  • 23f0ecc3
    by Sagar Ghuge at 2023-09-22T08:46:38-07:00
    blorp: Drop unnecessary assertions in blorp_can_hiz_clear_depth
    
    We already checks for the alignment and the multislice surface, we don't
    need to add assertions around those two.
    
    fixes: 37fcbb375cb ("blorp: Disable unaligned partial HIZ fast clears for HIZ_CCS too")
    closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/9684
    
    Signed-off-by: Sagar Ghuge <sagar.ghuge@intel.com>
    Tested-by: Mark Janes <markjanes@swizzler.org>
    Reviewed-by: Nanley Chery <nanley.g.chery@intel.com>
    Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24837>
    (cherry picked from commit 839b03cc06d63739b702e00a6f29472e7a0c058a)
    
  • 32763470
    by Mike Blumenkrantz at 2023-09-22T08:46:38-07:00
    zink: don't start multiple cache jobs for the same program
    
    if there's already a cache job in flight then starting a second one
    is illegal
    
    cc: mesa-stable
    
    Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24831>
    (cherry picked from commit d5157356ceffad6161ccc773cd6a3a9219f6b4e0)
    
  • e350c853
    by Rhys Perry at 2023-09-22T08:46:38-07:00
    aco: fix p_bpermute_gfx6 with input at non-zero byte
    
    Same as the other bpermute pseudo instructions.
    
    Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
    Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
    Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
    Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
    Cc: mesa-stable
    Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24693>
    (cherry picked from commit 85957dd6e5572dfe424f6fca2ca7a04e95084191)
    
  • f49e1ecc
    by Georg Lehmann at 2023-09-22T08:46:38-07:00
    aco: fix u2f16 with 32bit input
    
    The vulkan spec says all conversions are correctly rounded, so if the input
    is larger than the largest fp16 value, we need to return MAX_FLOAT/inf
    instead of cutting off the msbs.
    
    Cc: mesa-stable
    Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24826>
    (cherry picked from commit 6d949e18fd514ef386a9fce6710ca8e275778ddd)
    
  • d9eb323a
    by Dylan Baker at 2023-09-22T08:46:38-07:00
    .pick_status.json: Updates notes for 93b4f200dead198e680991a1e95bf3d3b58f87bd
    
  • 365d3dbe
    by Tapani Pälli at 2023-09-22T08:46:38-07:00
    mesa: fix some TexParameter and SamplerParameter cases
    
    EXT extension was added without tests so these functions did
    not work properly.
    
    Fixes: 799710be889 ("mesa: Add EXT_texture_mirror_clamp_to_edge to extension table")
    Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
    Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
    Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24845>
    (cherry picked from commit d65fe6eff1fbba390d885c84630a96be37ea76a0)
    
  • f3789c8c
    by Dylan Baker at 2023-09-22T08:46:39-07:00
    .pick_status.json: Updates notes for 7e246f7f2bde0c859269c4b81505bd0887045e7b
    
  • 3cfc1274
    by Dylan Baker at 2023-09-22T08:46:39-07:00
    .pick_status.json: Updates notes for 9865e5dff49395543da4331a943ba5a03ce6a413
    
  • a02429d4
    by Rhys Perry at 2023-09-22T08:46:39-07:00
    radv: fix 128bpp comp-to-single clears
    
    We were clearing GB to A, instead of R.
    
    This fixes some red tinting in Overwatch 2 when shadow quality is set to
    "Ultra".
    
    Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
    Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
    Fixes: 7451eb1d6112 ("radv: implement DCC fast clears with comp-to-single")
    Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/9446
    Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24400>
    (cherry picked from commit e2c7ce37192cef693c7a228b997402d480674a0a)
    
  • 6b99242d
    by Marcin Ślusarz at 2023-09-22T08:46:39-07:00
    intel/compiler/mesh: compactify MUE layout
    
    Instead of using 4 dwords for each output slot, use only the amount
    of memory actually needed by each variable.
    
    There are some complications from this "obvious" idea:
    - flat and non-flat variables can't be merged into the same vec4 slot,
      because flat inputs mask has vec4 stride
    - multi-slot variables can have different layout:
       float[N] requires N 1-dword slots, but
       i64vec3 requires 1 fully occupied 4-dword slot followed by 2-dword slot
    - some output variables occur both in single-channel/component split
      and combined variants
    - crossing vec4 boundary requires generating more writes, so avoiding them
      if possible is beneficial
    
    This patch fixes some issues with arrays in per-vertex and per-primitive data
    (func.mesh.ext.outputs.*.indirect_array.q0 in crucible)
    and by reduction in single MUE size it allows spawning more threads at
    the same time.
    
    Note: this patch doesn't improve vk_meshlet_cadscene performance because
    default layout is already optimal enough.
    
    Reviewed-by: Ivan Briano <ivan.briano@intel.com>
    (cherry picked from commit a2521233631b72e7d9131243818e68fd911b94c6)
    
    Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25188>
    
  • 03fc9642
    by Marcin Ślusarz at 2023-09-22T08:46:39-07:00
    intel/compiler,anv: put some vertex and primitive data in headers
    
    Both per-primitive and per-vertex space is allocated in MUE in 8 dword
    chunks and those 8-dword chunks (granularity of
    3DSTATE_SBE_MESH.Per[Primitive|Vertex]URBEntryOutputReadLength)
    are passed to fragment shaders as inputs (either non-interpolated
    for per-primitive and flat vertex attributes or interpolated
    for non-flat vertex attributes).
    
    Some attributes have a special meaning and must be placed in separate
    8/16-dword slot called Primitive Header or Vertex Header.
    
    Primitive Header contains 4 such attributes (Cull Primitive,
    ViewportIndex, RTAIndex, CPS), leaving 4 dwords (the rest of 8-dword
    slot) potentially unused.
    
    Vertex Header is similar - it starts with 3 unused dwords, 1 dword for
    Point Size (but if we declare that shader doesn't produce Point Size
    then we can reuse it), followed by 4 dwords for Position and optionally
    8 dwords for clip distances.
    
    This means we have an interesting optimization problem - we can put
    some user attributes into holes in Primitive and Vertex Headers, which
    may lead to smaller MUE size and potentially more mesh threads running
    in parallel, but we have to be careful to use those holes only when
    we need it, otherwise we could force HW to pass too much data to
    fragment shader.
    
    Example 1:
    Let's assume that Primitive Header is enabled and user defined
    12 dwords of per-primitive attributes.
    
    Without packing we would consume 8 + ALIGN(12, 8) = 24 dwords of
    MUE space and pass ALIGN(12, 8) = 16 dwords to fragment shader.
    
    With packing, we'll consume 4 + 4 + ALIGN(12 - 4, 8) = 16 dwords of
    MUE space and pass ALIGN(4, 8) + ALIGN(12 - 4, 8) = 16 dwords to
    fragment shader.
    
    16/16 is better than 24/16, so packing makes sense.
    
    Example 2:
    Now let's assume that Primitive Header is enabled and user defined
    16 dwords of per-primitive attributes.
    
    Without packing we would consume 8 + ALIGN(16, 8) = 24 dwords of
    MUE space and pass ALIGN(16, 16) = 16 dwords to fragment shader.
    
    With packing, we'll consume 4 + 4 + ALIGN(16 - 4, 8) = 24 dwords of
    MUE space and pass ALIGN(4, 8) + ALIGN(16 - 4, 8) = 24 dwords to
    fragment shader.
    
    24/24 is worse than 24/16, so packing doesn't make sense.
    
    This change doesn't affect vk_meshlet_cadscene in default configuration,
    but it speeds it up by up to 25% with "-extraattributes N", where
    N is some small value divisible by 2 (by default N == 1) and we
    are bound by URB size.
    
    Reviewed-by: Ivan Briano <ivan.briano@intel.com>
    (cherry picked from commit c1685f08dd4edcf505d5e9a150b70ccbbb989fa5)
    
    Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25188>
    
  • 7f766cfb
    by Marcin Ślusarz at 2023-09-22T08:46:39-07:00
    intel/compiler: load debug mesh compaction options once
    
    Reviewed-by: Ivan Briano <ivan.briano@intel.com>
    (cherry picked from commit 48885c7fe347b61555ddae247a7c7fdc6834a6a1)
    
    Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25188>
    
  • 73ccbcab
    by Iván Briano at 2023-09-22T08:46:39-07:00
    blorp: fix hangs with mesh enabled
    
    Move mesh URB allocations together with the other stages.
    
    This fixes a hang that started happening with mesh enabled after
    419531c5d98 ("intel/blorp: add a new flag to communicate PSS sync need")
    
    Bspec 45352 says:
      L3 Space allocation can only be changed when the GPU pipeline is
      completely flushed.
    
    It's likely that the PIPE_CONTROL added in that commit was breaking that
    assumption and the URB allocation happening afterwards at the end of the
    pipeline emission would then hang. And before that, we were probably
    just getting lucky.
    
    Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
    (cherry picked from commit bcde58ea86e048b8aec5459294b46daf97f85a0d)
    
    Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25188>
    
  • 39320951
    by Iván Briano at 2023-09-22T08:46:39-07:00
    anv: use a simpler MUE layout for fast linked libraries
    
    The compaction introduced in a2521233631 ("intel/compiler/mesh: compactify MUE layout")
    is not suitable for the case where graphics pipeline libraries are fast
    linked, as the fragment shader won't receive the mue_map to know where
    to locate its inputs.
    For that case, keep doing what we did before and lay things down in the
    order varyings are defined, which is also how it works for the non-mesh
    case.
    
    Fixes dEQP-VK.fragment_shading_rate.*fast_linked_library*.ms
    
    Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
    (cherry picked from commit b200e5765cb51bcfefac583f811b3d246b919282)
    
    Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25188>
    
  • c3a84ff4
    by Iván Briano at 2023-09-22T08:46:39-07:00
    anv: track what kind of pipeline a fragment shader may be used with
    
    Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
    (cherry picked from commit d36da7c5f82d0ff1608bd90ce5a9aafec7f556d4)
    
    Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25188>
    
  • bbdc325e
    by Iván Briano at 2023-09-22T08:46:39-07:00
    intel/fs: read viewport and layer from the FS payload
    
    Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
    (cherry picked from commit 17d7f7a292f0e9bf5b4b348eef08c699cf372a67)
    
    Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25188>
    
  • 4a49ba59
    by Iván Briano at 2023-09-22T08:46:39-07:00
    intel/fs: handle URB setup for fast linked mesh pipelines
    
    Up until now, the mesh pipeline assumed it would be always linked to the
    fragment shader, and so the calculated MUE map would always be
    available.
    That is not the case for fast linked pipeline libraries, so the URB
    setup needs to account for this. We do this by replicating what's done
    for non-mesh pipelines, defining the URB based on the FS inputs, and
    always assuming they will be laid out in order of varying number, except
    that we also account for per-primitive attributes.
    
    Fixes all GPL using tests under dEQP-VK.mesh_shader.ext.smoke.*
    
    Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
    (cherry picked from commit 4eddeea7bf2423ab9ad5ee50d0ce230180512c84)
    
    Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25188>
    
  • e3ce501d
    by Iván Briano at 2023-09-22T08:46:39-07:00
    anv: enable VK_EXT_mesh_shader where supported
    
    Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
    (cherry picked from commit 23f9e89fce63362698fbd72ed0af05f43206ee68)
    
    Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25188>
    
  • 9a012e05
    by Iván Briano at 2023-09-22T08:46:39-07:00
    intel/fs: use ffsll so we don't explode on 32 bits
    
    Fixes: b200e5765cb ("anv: use a simpler MUE layout for fast linked libraries")
    
    Tested-by: Mark Janes <markjanes@swizzler.org>
    (cherry picked from commit f1bc58cb7bd7ee5622da2eec47921a5f8548b15c)
    
    Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25188>
    
  • 156a2682
    by Timur Kristóf at 2023-09-22T08:46:39-07:00
    ac/nir: Add done arg to ac_nir_export_position.
    
    This prepares for a workaround where we won't need to add
    the done flag to the last export in this function, because
    it will be added in a subsequent call to the same function.
    
    Cc: mesa-stable
    Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
    Reviewed-by: Qiang Yu <yuq825@gmail.com>
    Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
    (cherry picked from commit 838d886d901ab2adc4c317652aebdd0bf3d52481)
    
    Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25157>
    
  • 1f0ba8cd
    by Timur Kristóf at 2023-09-22T08:46:39-07:00
    ac/nir: Slightly refactor how pos0 exports are added when missing.
    
    Prepares for a workaround. Makes it possible for this function
    to not emit the pos0 export at all so that it can be emitted
    by a subsequent call to the function later.
    
    Cc: mesa-stable
    Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
    Reviewed-by: Qiang Yu <yuq825@gmail.com>
    Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
    (cherry picked from commit 9c096e4ace70c0b4f9c390bfc275596b10a0bd72)
    
    Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25157>
    
  • 93c501e2
    by Timur Kristóf at 2023-09-22T08:46:39-07:00
    ac/nir/ngg: Wait for attribute stores before VS/TES/GS pos0 export.
    
    This is a HW bug workaround for some (all?) GFX11 chips.
    
    On these chips, rasterization can start before the attribute ring
    stores are finished, which can cause issues.
    As a workaround, wait for attribute ring stores to finish
    before doing the position export.
    
    Mesh shaders will be taken care of in another commit.
    
    Cc: mesa-stable
    Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
    Reviewed-by: Qiang Yu <yuq825@gmail.com>
    Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
    (cherry picked from commit edd51655f0eb44178c9e402ae35667bd184adf2a)
    
    Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25157>
    
  • e78d9b00
    by Timur Kristóf at 2023-09-22T08:46:39-07:00
    ac/nir/ngg: Refactor mesh shader primitive export.
    
    Cleanup the code that generates the two channels of the
    primitive export instruction, and move storing the built-in
    per-primitive outputs out to match how vertex attributes work.
    
    Prepares the mesh shader lowering for a workaround that
    affect export instructions.
    
    Cc: mesa-stable
    Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
    Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
    (cherry picked from commit 0721784b78ad85d5c281530858bfb50490d741b9)
    
    Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25157>
    
  • f066d9bc
    by Timur Kristóf at 2023-09-22T08:46:39-07:00
    ac/nir/ngg: Wait for attribute ring stores in mesh shaders.
    
    Make sure that both per-vertex and per-primitive attribute
    ring stores are finished before position or primitive export
    instructions are executed.
    
    This is necessary because we need to ensure that mesh shader
    waves work correctly when they have either vertex-only or
    primitive-only waves.
    
    Cc: mesa-stable
    Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
    Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
    (cherry picked from commit 93b4f200dead198e680991a1e95bf3d3b58f87bd)
    
    Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25157>
    
  • 29fc24d2
    by Mike Blumenkrantz at 2023-09-22T08:46:39-07:00
    zink: disable validation
    
    stable branch validation can't work since not all validation fixes
    get backported
    
    Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25339>
    
  • 2f49a890
    by Karol Herbst at 2023-09-22T16:50:19+00:00
    clc: use CLANG_RESOURCE_DIR for clang's resource path
    
    With certain build configuration that value can be a non empty string and
    needs to be used.
    
    This will also require distributions to rebuild mesa if and only if
    CLANG_RESOURCE_DIR changes between clang rebuilds or updates.
    
    Signed-off-by: Karol Herbst <git@karolherbst.de>
    (cherry picked from commit e1c278ae825958186418cc8201a6f49f74b75181)
    
    Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25228>
    
  • e35f25f7
    by Matt Turner at 2023-09-22T16:50:19+00:00
    intel: Rearrange for next commit
    
    (cherry picked from commit 37b88a72fb2ea510a284821c53f4484d9c622b45)
    
    Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25228>
    
  • 26d7e07a
    by Matt Turner at 2023-09-22T16:50:19+00:00
    intel: Consider with_intel_clc in with_any_intel
    
    This makes it possible to configure mesa to build only intel_clc.
    
    (cherry picked from commit 4f89c1dafd63dacc364dbcdc445206b63dee3fd0)
    
    Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25228>
    
  • 1165dbc2
    by Matt Turner at 2023-09-22T16:50:19+00:00
    intel: Only build blorp if drivers are enabled
    
    (cherry picked from commit 60d01cb1afa337db1fd76d17e469b7a4a39e994b)
    
    Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25228>
    
  • b3f263d5
    by Matt Turner at 2023-09-22T16:50:20+00:00
    intel: Only build ds if drivers are enabled
    
    (cherry picked from commit ce7d41bbc501333856ebc70c61b14a7f6d7aa04c)
    
    Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25228>
    
  • 407d4792
    by Matt Turner at 2023-09-22T16:50:20+00:00
    intel: Only build perf if drivers or tools are enabled
    
    (cherry picked from commit 01f5fd36c88f3767383c5f85c9101d262256a9d5)
    
    Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25228>
    
  • d38b06ac
    by Matt Turner at 2023-09-22T16:50:20+00:00
    intel: Allow using intel_clc from the system
    
    With -Dintel-clc=system, the build system will search for an `intel_clc`
    binary and use it instead of building `intel_clc` itself.
    
    This allows Intel Vulkan ray tracing support to be built when cross
    compiling without terrible hacks (that would otherwise be necessary due
    to `intel_clc`'s dependence on SPIRV-LLVM-Translator, libclc, clang, and
    LLVM).
    
    (cherry picked from commit 28c1053c07c177854520f6283fa665f17618adb5)
    
    Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25228>
    
  • 882608de
    by Matt Turner at 2023-09-22T16:50:20+00:00
    intel: Limit Intel Vulkan RT to x86_64
    
    Note: passed CI repeatedly except for the timing out WHL jobs.
    
    Fixes: 28c1053c07c ("intel: Allow using intel_clc from the system")
    (cherry picked from commit c38b67f4d1abe7b137b24dbfa4aaf0be46c2b193)
    
    Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25228>
    
  • f2a94d18
    by Daniel Stone at 2023-09-22T17:31:12+00:00
    egl/wayland: Always initialise fd_display_gpu
    
    Set it to an invalid value, rather than leaving it to be stdout or
    something.
    
    Signed-off-by: Daniel Stone <daniels@collabora.com>
    Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25319>
    
  • 871de43c
    by Dylan Baker at 2023-09-22T11:08:16-07:00
    .pick_status.json: Update to 1cdc4be14b66108ae0e8069686ac3efe52bef3cb
    
  • 5fc0e242
    by David Rosca at 2023-09-22T11:08:35-07:00
    Revert "radeonsi/vcn: add an exception of field case for h264 decoding"
    
    This change causes page faults when playing corrupted video from the
    bugreport. The original issue have now been resolved in firmware.
    
    This reverts commit bfce57c7a5ba62d8e6f65addb2df136cab603a68.
    
    Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/9210
    
    Reviewed-by: Ruijing Dong <ruijing.dong@amd.com>
    Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24836>
    (cherry picked from commit ee1132bd793d26f512d0eaab7a6fb198634968c5)
    
  • deb24df2
    by Jordan Justen at 2023-09-22T11:08:36-07:00
    intel/dev: Use RPL-U name on RPL-U devices
    
    Ref: https://patchwork.freedesktop.org/patch/553646/?series=122712&rev=1
    Cc: mesa-stable
    Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
    Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
    Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24820>
    (cherry picked from commit 27f6b4b1c663108967a76b33db9e076c415484df)
    
  • 7f2c09c6
    by Jordan Justen at 2023-09-22T11:08:37-07:00
    intel/dev: Add more RPL PCI IDs
    
    Ref: https://patchwork.freedesktop.org/patch/553646/?series=122712&rev=1
    Cc: mesa-stable
    Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
    Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
    Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24820>
    (cherry picked from commit d65b0b042476f1fa785b93991dba338d1071f880)
    
  • f81d8db0
    by Karol Herbst at 2023-09-22T11:08:40-07:00
    zink: fix source type in load/store scratch
    
    Fixes: ddc5c304899 ("zink: handle global and scratch vars")
    Signed-off-by: Karol Herbst <git@karolherbst.de>
    Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24859>
    (cherry picked from commit ac1685bc6a8ca6d36c1048bf8fac1af44f88ed94)
    
  • a078c471
    by Karol Herbst at 2023-09-22T11:08:41-07:00
    zink: fix global stores
    
    We have to cast the value if the type doesn't match.
    
    Fixes: ddc5c304899 ("zink: handle global and scratch vars")
    Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24859>
    (cherry picked from commit ac289b7268a510852df3d48ce4786674142e109f)
    
  • 9f8a82f5
    by Dmitry Baryshkov at 2023-09-22T11:08:42-07:00
    tu: Pass real size of prime buffers to allocator
    
    The msm driver reserves the actual DMABUF size in the memory map, while
    TU can request smaller memory chunk to be allocated. This potentially
    can lead to a situation when next allocation IOVA will be in the middle
    of the address space which is reserved for the DMABUF. Pass the
    `real_size' to TU allocator instead, so that kernel and userspace have
    the same picture of memory allocations.
    
    Cc: mesa-stable
    Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
    Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24861>
    (cherry picked from commit 2fdcc00b0154cb094a5fd2c9253904fc9073d96e)
    
  • 0ee3d2be
    by Konstantin Seurer at 2023-09-22T11:08:43-07:00
    vulkan/wsi/x11: Implement capture hotkey using the keymap
    
    This way, we can avoid opening another connection. The capture key is
    changes to F1 because F12 has issues on Wayland. (After pressing F12,
    all keys become unresponsive, refocussing the window fixes it)
    
    Fixes: 291fa05  ("vulkan/wsi/x11: Capture traces using a hotkey")
    Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/9578
    Reviewed-by: Konstantin Seurer <konstantin.seurer@gmail.com>
    Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24710>
    (cherry picked from commit 8c98814874df588fa205d15ea08f93746e959952)
    
  • 77ff616b
    by Kenneth Graunke at 2023-09-22T11:08:44-07:00
    iris: Check prog[] instead of uncompiled[] for BLORP state skipping
    
    Huge thanks to Tapani Pälli for debugging this issue, figuring out
    what was going wrong, proposing fixes, and walking me through where
    things were going off the rails.
    
    BLORP always disables tessellation and geometry shaders.  Our handling
    tried to look at ice->shaders.uncompiled[] to determine whether the next
    draw needed those shaders.  If not, we can leave BLORP's residual state
    that disabled those stages in place, and skip looking at it.
    
    Unfortunately, predicting the future is a bit fraught, in part due to
    the uncompiled[] and prog[] arrays being slightly out of sync at times.
    
    Consider the following case:
    
    1. Draw with tessellation shaders in place
    
       => uncompiled[TES] and prog[TES] will both point at valid shaders.
    
    2. Gallium calls pipe->bind_tes_state(NULL).
    
       => This makes uncompiled[TES] point at NULL, and flags
          IRIS_STAGE_DIRTY_UNCOMPILED_TES.
    
          Because iris_update_compiled_shaders() hasn't happened yet,
          uncompiled[TES] is NULL but prog[TES] has the stale TES from
          the previous draw still.
    
    3. BLORP operations happen
    
       => BLORP sees uncompiled[TES] == NULL and decides that tessellation
          is off for the upcoming draws.  So it skips flagging tess state.
    
    4. Gallium calls pipe->bind_tes_state(shader from step #1).
    
       => uncompiled[TES] points at the original shader.
          IRIS_STAGE_DIRTY_UNCOMPILED_TES gets flagged again.
    
    5. Draw again
    
       => This calls iris_update_compiled_shaders(), which sees that
          a TES is bound, and calls iris_update_compiled_tes().  But
          because the same shader was bound as before, the program it
          comes up with is identical to the one already bound at
          ice->shaders.prog[TES].  So, it thinks it doesn't have to
          flag any tessellation state dirty because it was already
          set up for the last draw.
    
    This random unbind and rebind between draws leads to a situation
    where, at step #3, BLORP thinks it can skip flagging tessellation
    state (nothing is bound), and at step #5, normal state handling
    thinks it can skip flagging tessellation state (nothing changed
    since last time).  So nobody does, and things break.
    
    This unbind appears to be happening when st_release_variants()
    decides it wants to free some shaders.  Then a rebind happens to
    put back the actual shader for the draw.  So, it's not theoretical.
    
    To fix this, we change BLORP to look at ice->shaders.prog[] rather
    than uncompiled[].  This is equivalent to thinking about the previous
    draw, rather than the next.  If the last draw had tessellation off,
    then BLORP's disabling was a no-op, and the GPU is still in the same
    state as the previous draw.  This is more reliable than predicting
    the future.
    
    Cc: mesa-stable
    Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/8308
    Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/9678
    Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
    Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24880>
    (cherry picked from commit d693027a00fe5f2cf2b9548b69b50078ec0113be)
    
  • 062d7e95
    by Paul Gofman at 2023-09-22T11:08:45-07:00
    driconf: add a workaround for Rainbow Six Extraction
    
    CC: mesa-stable
    Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24784>
    (cherry picked from commit 3e66eba59e6617d51d8315727e3adf41b42b56f7)
    
  • cfed3fb8
    by Vinson Lee at 2023-09-22T11:08:46-07:00
    vk/wsi/x11: Remove dead code
    
    Fix defect reported by Coverity Scan.
    
    Logically dead code (DEADCODE)
    dead_error_line: Execution cannot reach this statement: return VK_ERROR_SURFACE_LOS....
    
    Fixes: fb9f697fbb8 ("vk/wsi/x11: move surface alpha check from get_caps to creation")
    Signed-off-by: Vinson Lee <vlee@freedesktop.org>
    Reviewed-by: Adam Jackson <ajax@redhat.com>
    Reviewed-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
    Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24802>
    (cherry picked from commit 71466eb863e9433461edd2b04e6cb69f0457f573)
    
  • 296653f3
    by Timothy Arceri at 2023-09-22T13:44:36-07:00
    util: add radeonsi workaround for Nowhere Patrol
    
    Cc: mesa-stable
    
    Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
    Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24919>
    (cherry picked from commit ddac37a8b3bc9e199887dfd9ead2ccadefa34e55)
    
  • 29fd84a5
    by Rhys Perry at 2023-09-22T13:44:36-07:00
    aco/spill: skip p_branch in process_block
    
    Fixes compilation of a Dead by Daylight shader.
    
    fossil-db (gfx1100):
    Totals from 58 (0.04% of 133461) affected shaders:
    Instrs: 319824 -> 319421 (-0.13%); split: -0.13%, +0.00%
    CodeSize: 1711260 -> 1708744 (-0.15%); split: -0.15%, +0.00%
    SpillSGPRs: 2567 -> 2459 (-4.21%)
    Latency: 3274930 -> 3274921 (-0.00%); split: -0.00%, +0.00%
    InvThroughput: 924106 -> 924105 (-0.00%); split: -0.00%, +0.00%
    Copies: 41883 -> 41757 (-0.30%); split: -0.31%, +0.00%
    Branches: 9144 -> 9146 (+0.02%)
    
    Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
    Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
    Cc: mesa-stable
    Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/9599
    Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24896>
    (cherry picked from commit cb096b85ff14e62aba4275128d0c082e98a21d80)
    
  • 6a48a14c
    by Eric Engestrom at 2023-09-22T13:44:36-07:00
    ci/farm-rules: fix missing valve-infra jobs in scheduled pipelines
    
    Fixes: 79f7882fc60451530235 ("ci: add quirk for GitLab assuming changes is always true for scheduled runs")
    Signed-off-by: Eric Engestrom <eric@igalia.com>
    Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24897>
    (cherry picked from commit f97e38f9cdabf6e1cfab11ebaabf193492bd403c)
    
  • 4ebe99bd
    by Helen Koike at 2023-09-22T13:44:36-07:00
    ci/android: remove strace output from cuttlefish-runner.sh
    
    strace output is only used for debug and its output takes too much
    space. Remove it to save resources.
    
    Signed-off-by: Helen Koike <helen.koike@collabora.com>
    Reviewed-by: David Heidelberg <david.heidelberg@collabora.com>
    Reviewed-by: Guilherme Gallo <guilherme.gallo@collabora.com>
    Fixes: 7b51a583edb7 ("ci/android: add android to the ci")
    Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24913>
    (cherry picked from commit e6625fa25a46095baa75b35caa9b3dab00f9b1b8)
    
  • 540b8473
    by Lionel Landwerlin at 2023-09-22T13:44:36-07:00
    intel/compiler: disable per-sample interpolation modes with non-per-sample dispatch
    
    Fixes hangs in dEQP-GLES31.functional.shaders.multisample_interpolation.interpolate_at_sample.*
    
    Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
    Fixes: 5644011f06 ("intel/compiler: Convert wm_prog_key::persample_interp to a tri-state")
    Reviewed-by: Emma Anholt <emma@anholt.net>
    Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24716>
    (cherry picked from commit d74c3010268e6d2b7c0ef9a4d3caaf1f7e1b3a5a)
    
  • 78e67654
    by Dylan Baker at 2023-09-22T13:45:42-07:00
    .pick_status.json: Updates notes for b8ea9724fa5ca38620bc0cdc01b7addd05574954
    
  • 60beb571
    by Corentin Noël at 2023-09-24T11:28:59-07:00
    virgl: Do not expose EXT_texture_mirror_clamp when using a GLES host
    
    The GL_MIRROR_CLAMP_EXT wrap parameter is never available in GLES.
    
    This fixes the `spec@!opengl 1.1@texwrap 2d proj` piglit test when using a GLES
    host.
    
    Signed-off-by: Corentin Noël <corentin.noel@collabora.com>
    Reviewed-by: Filip Gawin <filip.gawin@collabora.com>
    Cc: mesa-stable
    Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24935>
    (cherry picked from commit 9c39ea796cd689670ab17e0c5dcc0c0b76db2cb4)
    
  • 2450274b
    by Rhys Perry at 2023-09-24T11:28:59-07:00
    aco/spill: add all live-in to merge block spill candidates
    
    Previously, only already spilled live-in or phis were added to the spill
    candidates. Because of branch definitions, this might not be enough.
    
    Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
    Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
    Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/9722
    Cc: mesa-stable
    Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24949>
    (cherry picked from commit c7bb2f7bb9d81fe6236ca6f9df0631cae64ce573)
    
  • 355e68ef
    by Karol Herbst at 2023-09-24T11:28:59-07:00
    rusticl/disk_cache: fix stack corruption
    
    The length passed to mesa_bytes_to_hex is the one of the input, not output
    data.
    
    Fixes: fbe9a7ca3e7 ("rusticl/mesa: create proper build-id hash for the disk cache")
    Signed-off-by: Karol Herbst <git@karolherbst.de>
    Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
    Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24967>
    (cherry picked from commit 1a20ac7891f08369da36df82572f12860ec528ce)
    
  • fa0689d2
    by Karol Herbst at 2023-09-24T11:28:59-07:00
    rusticl/memory: do not verify pitch for IMAGE1D_BUFFER
    
    Devices might report an image_pitch_alignment of 0 leading to a division
    by 0 trap.
    
    Fixes: 06daa03c5cd ("rusticl: Implement spec for cl_khr_image2d_from_buffer")
    Signed-off-by: Karol Herbst <git@karolherbst.de>
    Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24993>
    (cherry picked from commit 526380261821cf820d70963ba07f61f46436ba9e)
    
  • 7b5bfa24
    by Lionel Landwerlin at 2023-09-24T11:28:59-07:00
    anv: add missing ISL storage usage
    
    ISL makes a bunch of decision on programming (MOCS,
    RENDER_SURFACE_STATE values) based on this flag. It's important to set
    it if we're going to use an image as storage.
    
    Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
    Cc: mesa-stable
    Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
    Reviewed-by: Nanley Chery <nanley.g.chery@intel.com>
    Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23620>
    (cherry picked from commit 34d5db05835b89a87a29865570047a52fe506048)
    
  • b11e92d9
    by Rohan Garg at 2023-09-24T11:28:59-07:00
    anv: drop dead ifdef
    
    The GFX_VERX10 macro doesn't exist and we no longer use
    SCRATCH_SURFACE_STATE_POOL_SIZE.
    
    Signed-off-by: Rohan Garg <rohan.garg@intel.com>
    Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
    Fixes: b3f6e5dc702 ('anv: remove incorrect ifdef')
    Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25011>
    (cherry picked from commit cbc491666172802e09482381049cea073bb69dd8)
    
  • c82046a2
    by Rohan Garg at 2023-09-24T11:29:00-07:00
    iris: use the correct WA macros and lineage numbers
    
    Signed-off-by: Rohan Garg <rohan.garg@intel.com>
    Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
    Fixes: 0ce595a89a ("intel: use generated helpers for Wa_1508744258")
    Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25011>
    (cherry picked from commit 50c2fe46fab4db7495af7c23ceaeafd06b8ad81b)
    
  • e7e224b4
    by Rohan Garg at 2023-09-24T11:29:00-07:00
    anv: use the lineage number for WA
    
    Signed-off-by: Rohan Garg <rohan.garg@intel.com>
    Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
    Fixes: d0669f3ede ("intel/dev: switch defect identifiers to use lineage numbers")
    Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25011>
    (cherry picked from commit 86e8ba4d327bf2d9860c88978ee524d8065c8006)
    
  • cc191d96
    by Rohan Garg at 2023-09-24T11:29:00-07:00
    crocus: fix GFX_VERx10 macro
    
    Signed-off-by: Rohan Garg <rohan.garg@intel.com>
    Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
    cc: mesa-stable
    
    Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25011>
    (cherry picked from commit 99a88ca4a2419dd2efb02d5b2f5352b8fb5786a0)
    
  • 6b94bcfa
    by Rohan Garg at 2023-09-24T11:29:00-07:00
    blorp: drop undefined macro
    
    Signed-off-by: Rohan Garg <rohan.garg@intel.com>
    Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
    Fixes: 97d6ceaf04 ("intel: Remove GEN_IS_HASWELL macro")
    Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25011>
    (cherry picked from commit ca7ae1a53f83e71a8a117f12a7079cd57485166b)
    
  • 610c09a2
    by Leo Liu at 2023-09-24T11:29:00-07:00
    radeonsi/vcn: fix the incorrect dt_size
    
    Issue: For texture with multiple planes, the planes will point to the
    same BO with the total size, so current vcn dt_size is incorrect.
    
    (gdb) p/x *((struct si_resource *)(((struct vl_video_buffer *)out_surf)->resources[0]))
    ...
      buf = 0x5555558daa30,
      gpu_address = 0xffff800101000000,
      bo_size = 0xa2000,
    ...
    }
    (gdb) p/x *((struct si_resource *)(((struct vl_video_buffer *)out_surf)->resources[1]))
    ...
      buf = 0x5555558daa30,
      gpu_address = 0xffff800101000000,
      bo_size = 0xa2000,
    ...
    }
    
    This is because: in function static struct si_texture *si_texture_create_object(),
       if (plane0) {
          /* The buffer is shared with the first plane. */
          resource->bo_size = plane0->buffer.bo_size;
          ...
          radeon_bo_reference(sscreen->ws, &resource->buf, plane0->buffer.buf);
          resource->gpu_address = plane0->buffer.gpu_address;
       }
    
    Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/9728
    Cc: mesa-stable
    
    Signed-off-by: Leo Liu <leo.liu@amd.com>
    Reviewed-by: Ruijing Dong <ruijing.dong@amd.com>
    Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25013>
    (cherry picked from commit 7876a2f68532a2bc5ab044cab726eae7fba328fa)
    
  • 4c4ef513
    by Mike Blumenkrantz at 2023-09-24T11:29:00-07:00
    zink: be more precise about flagging rp changes around unordered u_blitter
    
    failing to update rp attachments as needed after unordered blits results in
    broken (depth) rendering
    
    Fixes: 3a9f7d70383 ("zink: implement unordered u_blitter calls")
    Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24934>
    (cherry picked from commit 98340dc8c40d3bb2dbe47eac5fcdf3d65bba87a4)
    
  • 1763073c
    by Mike Blumenkrantz at 2023-09-24T11:29:00-07:00
    zink: fix linear modifier dmabuf imports
    
    these are disguised as INVALID modifiers, but really they're LINEAR
    
    cc: mesa-stable
    
    Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25002>
    (cherry picked from commit ca162bc82d585bcbd4ec3ff61485ac1ce8247b7d)
    
  • 2e9cda7e
    by Samuel Pitoiset at 2023-09-24T11:29:00-07:00
    radv/amdgpu: fix executing secondaries without IB2
    
    If a secondary cmdbuf has been grown and is executed without IB2
    (eg. on compute queue or when it's not allowed), the ib size ptr
    contains chaining info, which means the IB size was wrong.
    
    This fixes CPU crashes when running gl_vk_meshlet_cadscene.
    
    Fixes: 277b2afd708 ("radv/amdgpu: add support for executing DGC cmdbuf with RADV_DEBUG=noibs")
    Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
    Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24891>
    (cherry picked from commit 9206aeb077e60fa768f6fb06960cf6ad1b89cd2a)
    
  • 0935dd72
    by Samuel Pitoiset at 2023-09-24T11:29:00-07:00
    radv/amdgpu: do not copy the original chain link for IBs
    
    Otherwise, if a secondary CS is grown and then executed without IB2,
    the INDIRECT_BUFFER packet would have been copied but it shouldn't.
    
    This fixes a regression that introduced GPU hangs with
    gl_vk_meshlet_cadscene on RDNA2.
    
    Fixes: df0c742543d ("radv/amdgpu: rework growing a CS with the chained IB path slightly")
    Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
    Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24891>
    (cherry picked from commit e80fddf81fdd4292f16c3868a5d497af3e1990e6)
    
  • a032a14d
    by Lionel Landwerlin at 2023-09-24T11:29:00-07:00
    intel/nir: rerun lower_tex if it lowers something
    
    nir_lower_tex can lower tg4 coords into tg4 offset which on DG2+ we
    also need to lower into constant offsets.
    
    Unfortunately the nir_lower_tex pass is not able to lower the
    instructions it itself generates, so the easy fix for when
    nir_lower_tex lowers tg4 coords into tg4 offsets is to rerun the pass.
    
    Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
    Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/9735
    Cc: mesa-stable
    Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
    Tested-by: Yiwei Zhang <zzyiwei@chromium.org>
    Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25015>
    (cherry picked from commit 10e75aae1bddee9795b1ff04ffd656b0da79b5b5)
    
  • 0b560952
    by Connor Abbott at 2023-09-24T11:29:00-07:00
    vk/graphics_state: Fix copying MS locations pipeline state
    
    Copying the state below overwrote the ms.sample_locations we set,
    so our new_sample_locations was never actually used and we were
    accidentally doing a shallow copy. Turnip passes a stack-allocated
    old_state, so this resulted in invalid stack pointers.
    
    Fixes: f497cc9d56e ("vk/graphics_state: Add helpers for pre-baking state")
    Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25031>
    (cherry picked from commit 1cef1f02b543c75da96359edb09640537212c4df)
    
  • 52a47521
    by antonino at 2023-09-24T11:29:00-07:00
    vulkan/wsi: add `vk_wsi_force_swapchain_to_current_extent` driconf
    
    Add a driconf to force the swapchain size to match
    `VkSurfaceCapabilities2KHR::currentExtent` as a workaround for
    misbehaved games
    
    Fixes: 6139493ae38 ("vulkan/wsi: return VK_SUBOPTIMAL_KHR for sw/x11 on window resize")
    Reviewed-by: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
    Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24818>
    (cherry picked from commit aa657247ce8e4da53503c584a7a869a87b45f9fb)
    
  • e4354cfb
    by antonino at 2023-09-24T11:29:00-07:00
    drirc: enable `vk_wsi_force_swapchain_to_current_extent` for "The Talos Principle"
    
    This game handles swapchain size incorrecly and can crash because of
    it.
    
    Enable this driconf as a workaround.
    
    Fixes: 6139493ae38 ("vulkan/wsi: return VK_SUBOPTIMAL_KHR for sw/x11 on window resize")
    Reviewed-by: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
    Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24818>
    (cherry picked from commit 142e317024c17814549f23c5ae745ae8a495eb8c)
    
  • 87a9412f
    by antonino at 2023-09-24T11:29:00-07:00
    drirc: enable `vk_wsi_force_swapchain_to_current_extent` for "Serious Sam Fusion"
    
    This game handles swapchain size incorrecly and can crash because of
    it.
    
    Enable this driconf as a workaround.
    
    Fixes: 6139493ae38 ("vulkan/wsi: return VK_SUBOPTIMAL_KHR for sw/x11 on window resize")
    Reviewed-by: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
    Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24818>
    (cherry picked from commit 1456cb9c0bb896467bee9f45135fa38700f4cf52)
    
  • 97ea9e77
    by Rohan Garg at 2023-09-24T11:29:01-07:00
    iris: migrate preemption streamwout wa to WA infra
    
    Fixes: db6c374 ('iris: disable preemption for 3DPRIMITIVE during streamout')
    Signed-off-by: Rohan Garg <rohan.garg@intel.com>
    Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
    Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25080>
    (cherry picked from commit a57faf50370f60e06e03062b0ff4a0c2c3258004)
    
  • 7fc8a05c
    by Lionel Landwerlin at 2023-09-24T11:29:01-07:00
    hasvk: add state cache invalidation back before fast clears
    
    Prior to 87149cc545, blorp added a state cache invalidation prior to
    fast clears. This got dropped on Hasvk.
    
    Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
    Fixes: 87149cc545 ("blorp: update and move fast clear PIPE_CONTROLs to drivers")
    Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24719>
    (cherry picked from commit 9231f24be1f5f52a1d64f2089808620dc7a146d2)
    
  • 862b804c
    by Mike Blumenkrantz at 2023-09-24T11:29:01-07:00
    aux/tc: handle stride mismatch during rp-optimized subdata
    
    to avoid splitting renderpasses, this subdata optimization handles the usual
    driver dance of staging buffer -> gpu copy
    
    if the pbo stride doesn't match the image format's stride, however, then
    a direct copy will yield broken pixels and the image will misrender. to avoid this,
    detect stride mismatch and translate the single subdata call into a sequence
    of non-overlapping subdata calls that the driver can magically figure out
    while continuing to not split renderpasses
    
    fixes #9589
    
    cc: mesa-stable
    
    Acked-by: Marek Olšák <marek.olsak@amd.com>
    Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24849>
    (cherry picked from commit 51ad269198e425fae719a37f169b365a8b52e7f3)
    
  • 47267970
    by Dylan Baker at 2023-09-24T11:29:51-07:00
    .pick_status.json: Updates notes for 68027bd38e134f45d1fe8612c0c31e5379ed7435
    
  • 034928f6
    by Dylan Baker at 2023-09-24T13:29:21-07:00
    VERSION: update to 23.2.0-rc4
    
  • 75505b43
    by Timo Aaltonen at 2023-09-25T09:22:18+03:00
    Merge branch 'upstream-unstable' into debian-unstable
    
  • b12c8084
    by Timo Aaltonen at 2023-09-25T09:25:37+03:00
    version bump
    
  • 1ef6f8f7
    by Timo Aaltonen at 2023-09-25T09:29:19+03:00
    egl-wayland-Always-initialise-fd_display_gpu.patch: Dropped, upstream.
    
  • 47b44846
    by Timo Aaltonen at 2023-09-25T09:47:51+03:00
    fix-clover-build-without-spirv.diff: Fix clover build.
    
  • cf936feb
    by Timo Aaltonen at 2023-09-25T09:56:27+03:00
    control, rules: Bump llvm to 16. (Closes: #1051680)
    
  • 26a64224
    by Timo Aaltonen at 2023-09-25T10:01:58+03:00
    release to sid
    

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